/*
 * This file is part of the coreboot project.
 *
 * Copyright (C) 2009 One Laptop per Child, Association, Inc.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; version 2 of the License.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#ifndef DRIVINGCLKPHASEDATA_H
#define DRIVINGCLKPHASEDATA_H

#define MA_Table   3

#define DUTY_CYCLE_FREQ_NUM   6
#define DUTY_CYCLE_REG_NUM     3

#define Clk_Phase_Table_DDR2_Width	  6

#define WrtData_REG_NUM        4
#define WrtData_FREQ_NUM      6

#define DQ_DQS_Delay_Table_Width  4

#define DQS_INPUT_CAPTURE_REG_NUM            3
#define DQS_INPUT_CAPTURE_FREQ_NUM             6

#endif				/* DRIVINGCLKPHASEDATA_H */