## ## This file is part of the coreboot project. ## ## Copyright (C) 2007-2009 coresystems GmbH ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; version 2 of the License. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, write to the Free Software ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## config NORTHBRIDGE_AMD_AMDK8 bool select HAVE_DEBUG_RAM_SETUP select HAVE_DEBUG_SMBUS select HAVE_DEBUG_CAR select HYPERTRANSPORT_PLUGIN_SUPPORT if NORTHBRIDGE_AMD_AMDK8 config AGP_APERTURE_SIZE hex default 0x4000000 config K8_HT_FREQ_1G_SUPPORT bool default n config RAMINIT_SYSINFO bool default n config WAIT_BEFORE_CPUS_INIT bool default n config MEM_TRAIN_SEQ int default 0 # Force 2T DRAM timing (vendor BIOS does it even for single DIMM setups and # single DIMM is indeed unreliable without it). config K8_FORCE_2T_DRAM_TIMING bool default n config HW_MEM_HOLE_SIZEK hex default 0x100000 config HW_MEM_HOLE_SIZE_AUTO_INC bool default n config BOOTBLOCK_NORTHBRIDGE_INIT string default "northbridge/amd/amdk8/bootblock.c" config SB_HT_CHAIN_UNITID_OFFSET_ONLY bool default n config QRANK_DIMM_SUPPORT bool default n config K8_ALLOCATE_IO_RANGE bool default n config K8_REV_F_SUPPORT bool select RAMINIT_SYSINFO default n if K8_REV_F_SUPPORT config DIMM_DDR2 bool default n config DIMM_REGISTERED bool default n if DIMM_DDR2 if DIMM_REGISTERED config DIMM_SUPPORT hex default 0x0104 endif if !DIMM_REGISTERED config DIMM_SUPPORT hex default 0x0004 endif endif #DIMM_DDR2 endif #K8_REV_F_SUPPORT config IOMMU bool default y endif #NORTHBRIDGE_AMD_K8