#include #include #include #include #include #include "../../../northbridge/amd/amdk8/northbridge.h" #include "chip.h" #if 0 static void fixup_lsi_53c1030(struct device *pdev) { // uint8_t byte; uint16_t word; byte = 1; pci_write_config8(pdev, 0xff, byte); // Set the device id // pci_write_config_word(pdev, PCI_DEVICE_ID, PCI_DEVICE_ID_LSILOGIC_53C1030); // Set the subsytem vendor id // pci_write_config16(pdev, PCI_SUBSYSTEM_VENDOR_ID, PCI_VENDOR_ID_TYAN); word = 0x10f1; pci_write_config16(pdev, PCI_SUBSYSTEM_VENDOR_ID, word); // Set the subsytem id word = 0x2880; pci_write_config16(pdev, PCI_SUBSYSTEM_ID, word); // Disable writes to the device id byte = 0; pci_write_config8(pdev, 0xff, byte); // lsi_scsi_init(pdev); } #endif #if 0 static void print_pci_regs(struct device *dev) { uint8_t byte; int i; for(i=0;i<256;i++) { byte = pci_read_config8(dev, i); if((i%16)==0) printk_debug("\n%02x:",i); printk_debug(" %02x",byte); } printk_debug("\n"); // pci_write_config8(dev, 0x4, byte); } #endif #if 0 static void print_mem(void) { unsigned int i; unsigned int low_1MB = 0xf4107000; for(i=low_1MB;ichip_info; switch (pass) { default: break; // case CONF_PASS_PRE_CONSOLE: // case CONF_PASS_PRE_PCI: // case CONF_PASS_POST_PCI: case CONF_PASS_PRE_BOOT: // if (conf->fixup_scsi) // onboard_scsi_fixup(); // if (conf->fixup_vga) // vga_fixup(); printk_debug("mainboard fixup pass %d done\r\n", pass); break; } } #endif #undef DEBUG #define DEBUG 0 #if DEBUG static void debug_init(device_t dev) { unsigned bus; unsigned devfn; #if 0 for(bus = 0; bus < 256; bus++) { for(devfn = 0; devfn < 256; devfn++) { int i; dev = dev_find_slot(bus, devfn); if (!dev) { continue; } if (!dev->enabled) { continue; } printk_info("%02x:%02x.%0x aka %s\n", bus, devfn >> 3, devfn & 7, dev_path(dev)); for(i = 0; i < 256; i++) { if ((i & 0x0f) == 0) { printk_info("%02x:", i); } printk_info(" %02x", pci_read_config8(dev, i)); if ((i & 0x0f) == 0xf) { printk_info("\n"); } } printk_info("\n"); } } #endif #if 0 msr_t msr; unsigned index; unsigned eax, ebx, ecx, edx; index = 0x80000007; printk_debug("calling cpuid 0x%08x\n", index); asm volatile( "cpuid" : "=a" (eax), "=b" (ebx), "=c" (ecx), "=d" (edx) : "a" (index) ); printk_debug("cpuid[%08x]: %08x %08x %08x %08x\n", index, eax, ebx, ecx, edx); if (edx & (3 << 1)) { index = 0xC0010042; printk_debug("Reading msr: 0x%08x\n", index); msr = rdmsr(index); printk_debug("msr[0x%08x]: 0x%08x%08x\n", index, msr.hi, msr.hi); } #endif } static void debug_noop(device_t dummy) { } static struct device_operations debug_operations = { .read_resources = debug_noop, .set_resources = debug_noop, .enable_resources = debug_noop, .init = debug_init, }; static unsigned int scan_root_bus(device_t root, unsigned int max) { struct device_path path; device_t debug; max = root_dev_scan_bus(root, max); path.type = DEVICE_PATH_PNP; path.u.pnp.port = 0; path.u.pnp.device = 0; debug = alloc_dev(&root->link[1], &path); debug->ops = &debug_operations; return max; } #endif static void mainboard_init(device_t dev) { root_dev_init(dev); // do_verify_cpu_voltages(); } static struct device_operations mainboard_operations = { .read_resources = root_dev_read_resources, .set_resources = root_dev_set_resources, .enable_resources = root_dev_enable_resources, .init = mainboard_init, #if !DEBUG .scan_bus = root_dev_scan_bus, #else .scan_bus = scan_root_bus, #endif .enable = 0, }; static void enable_dev(struct device *dev) { dev_root.ops = &mainboard_operations; } struct chip_operations mainboard_tyan_s4882_ops = { .enable_dev = enable_dev, };