## ## Compute the location and size of where this firmware image ## (linuxBIOS plus bootloader) will live in the boot rom chip. ## if USE_FALLBACK_IMAGE default ROM_SECTION_SIZE = FALLBACK_SIZE default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE ) else default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE ) default ROM_SECTION_OFFSET = 0 end ## ## Compute the start location and size size of ## The linuxBIOS bootloader. ## default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) default CONFIG_ROM_STREAM_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) ## ## Compute where this copy of linuxBIOS will start in the boot rom ## default _ROMBASE = ( CONFIG_ROM_STREAM_START + PAYLOAD_SIZE ) ## ## Compute a range of ROM that can cached to speed up linuxBIOS, ## execution speed. ## ## XIP_ROM_SIZE must be a power of 2. ## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE ## default XIP_ROM_SIZE=65536 default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE ) arch i386 end ## ## Build the objects we have code for in this directory. ## driver mainboard.o if HAVE_MP_TABLE object mptable.o end if HAVE_PIRQ_TABLE object irq_tables.o end #object reset.o ## ## Romcc output ## makerule ./failover.E depends "$(MAINBOARD)/failover.c ./romcc" action "./romcc -E -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/failover.c -o $@" end makerule ./failover.inc depends "$(MAINBOARD)/failover.c ./romcc" action "./romcc -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/failover.c -o $@" end makerule ./auto.E depends "$(MAINBOARD)/auto.c option_table.h ./romcc" action "./romcc -E -mcpu=k8 -O2 -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@" end makerule ./auto.inc depends "$(MAINBOARD)/auto.c option_table.h ./romcc" action "./romcc -mcpu=k8 -O2 -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@" end ## ## Build our 16 bit and 32 bit linuxBIOS entry code ## mainboardinit cpu/x86/16bit/entry16.inc mainboardinit cpu/x86/32bit/entry32.inc ldscript /cpu/x86/16bit/entry16.lds ldscript /cpu/x86/32bit/entry32.lds ## ## Build our reset vector (This is where linuxBIOS is entered) ## if USE_FALLBACK_IMAGE mainboardinit cpu/x86/16bit/reset16.inc ldscript /cpu/x86/16bit/reset16.lds else mainboardinit cpu/x86/32bit/reset32.inc ldscript /cpu/x86/32bit/reset32.lds end ### Should this be in the northbridge code? mainboardinit arch/i386/lib/cpu_reset.inc ## ## Include an id string (For safe flashing) ## mainboardinit arch/i386/lib/id.inc ldscript /arch/i386/lib/id.lds ### ### This is the early phase of linuxBIOS startup ### Things are delicate and we test to see if we should ### failover to another image. ### if USE_FALLBACK_IMAGE ldscript /arch/i386/lib/failover.lds mainboardinit ./failover.inc end ### ### O.k. We aren't just an intermediary anymore! ### ## ## Setup RAM ## mainboardinit cpu/x86/fpu/enable_fpu.inc mainboardinit cpu/x86/mmx/enable_mmx.inc mainboardinit cpu/x86/sse/enable_sse.inc mainboardinit ./auto.inc mainboardinit cpu/x86/sse/disable_sse.inc mainboardinit cpu/x86/mmx/disable_mmx.inc ## ## Include the secondary Configuration files ## dir /pc80 if CONFIG_CHIP_NAME config chip.h end # sample config for tyan/s4882 chip northbridge/amd/amdk8/root_complex device pci_domain 0 on chip northbridge/amd/amdk8 device pci 18.0 on end # LDT0 device pci 18.0 on # northbridge # devices on link 1, link 1 == LDT 1 chip southbridge/amd/amd8131 # the on/off keyword is mandatory device pci 0.0 on end device pci 0.1 on end device pci 1.0 on end device pci 1.1 on end end chip southbridge/amd/amd8111 # this "device pci 0.0" is the parent the next one # PCI bridge device pci 0.0 on device pci 0.0 on end device pci 0.1 on end device pci 0.2 off end device pci 1.0 off end end device pci 1.0 on chip superio/winbond/w83627hf device pnp 2e.0 on # Floppy io 0x60 = 0x3f0 irq 0x70 = 6 drq 0x74 = 2 end device pnp 2e.1 off # Parallel Port io 0x60 = 0x378 irq 0x70 = 7 end device pnp 2e.2 on # Com1 io 0x60 = 0x3f8 irq 0x70 = 4 end device pnp 2e.3 on # Com2 io 0x60 = 0x2f8 irq 0x70 = 3 end device pnp 2e.5 on # Keyboard io 0x60 = 0x60 io 0x62 = 0x64 irq 0x70 = 1 irq 0x72 = 12 end device pnp 2e.6 off # CIR io 0x60 = 0x100 end device pnp 2e.7 off # GAME_MIDI_GIPO1 io 0x60 = 0x220 io 0x62 = 0x300 irq 0x70 = 9 end device pnp 2e.8 off end # GPIO2 device pnp 2e.9 off end # GPIO3 device pnp 2e.a off end # ACPI device pnp 2e.b on # HW Monitor io 0x60 = 0x290 irq 0x70 = 5 end end end device pci 1.1 on end device pci 1.2 on end device pci 1.3 on chip drivers/i2c/i2cmux # pca9556 smbus mux device i2c 18 on #0 pca9516 2, 1 chip drivers/i2c/lm63 #cpu0 temp device i2c 4c on end end end device i2c 18 on #1 pca9516 1, 1 chip drivers/generic/generic #dimm 0-0-0 device i2c 50 on end end chip drivers/generic/generic #dimm 0-0-1 device i2c 51 on end end chip drivers/generic/generic #dimm 0-1-0 device i2c 52 on end end chip drivers/generic/generic #dimm 0-1-1 device i2c 53 on end end end device i2c 18 on #2 pca9516 1, 2 chip drivers/generic/generic #dimm 1-0-0 device i2c 50 on end end chip drivers/generic/generic #dimm 1-0-1 device i2c 51 on end end chip drivers/generic/generic #dimm 1-1-0 device i2c 52 on end end chip drivers/generic/generic #dimm 1-1-1 device i2c 53 on end end end device i2c 18 on #3 pca9516 1, 3 chip drivers/generic/generic #dimm 2-0-0 device i2c 50 on end end chip drivers/generic/generic #dimm 2-0-1 device i2c 51 on end end chip drivers/generic/generic #dimm 2-1-0 device i2c 52 on end end chip drivers/generic/generic #dimm 2-1-1 device i2c 53 on end end end device i2c 18 on #4 pca9516 1, 4 chip drivers/generic/generic #dimm 3-0-0 device i2c 50 on end end chip drivers/generic/generic #dimm 3-0-1 device i2c 51 on end end chip drivers/generic/generic #dimm 3-1-0 device i2c 52 on end end chip drivers/generic/generic #dimm 3-1-1 device i2c 53 on end end end device i2c 18 on #5 pca9516 2, 2 chip drivers/i2c/lm63 #cpu1 temp device i2c 4c on end end end device i2c 18 on #6 pca9516 2, 3 chip drivers/i2c/lm63 #cpu2 temp device i2c 4c on end end end device i2c 18 on #7 pca9516 2, 4 chip drivers/i2c/lm63 #cpu3 temp device i2c 4c on end end end end # i2cmux chip drivers/i2c/adm1027 # ADM1027 CPU1 vid and System FAN... device i2c 2e on end end chip drivers/generic/generic # Winbond HWM 0x54 CPU0 vid device i2c 2a on end end chip drivers/generic/generic # Winbond HWM 0x92 device i2c 49 on end end chip drivers/generic/generic # Winbond HWM 0x94 device i2c 4a on end end chip drivers/generic/generic # ?? device i2c 69 on end end end # acpi device pci 1.5 off end device pci 1.6 off end end end # device pci 18.0 device pci 18.0 on end device pci 18.1 on end device pci 18.2 on end device pci 18.3 on end end chip northbridge/amd/amdk8 device pci 19.0 on end device pci 19.0 on end device pci 19.0 on end device pci 19.1 on end device pci 19.2 on end device pci 19.3 on end end chip northbridge/amd/amdk8 device pci 1a.0 on end device pci 1a.0 on end device pci 1a.0 on end device pci 1a.1 on end device pci 1a.2 on end device pci 1a.3 on end end chip northbridge/amd/amdk8 device pci 1b.0 on end device pci 1b.0 on end device pci 1b.0 on end device pci 1b.1 on end device pci 1b.2 on end device pci 1b.3 on end end end device apic_cluster 0 on chip cpu/amd/socket_940 device apic 0 on end end chip cpu/amd/socket_940 device apic 1 on end end chip cpu/amd/socket_940 device apic 2 on end end chip cpu/amd/socket_940 device apic 3 on end end end chip drivers/generic/debug device pnp 0.0 off end device pnp 0.1 off end device pnp 0.2 off end device pnp 0.3 off end device pnp 0.4 on end end end