## ## This file is part of the coreboot project. ## ## Copyright (C) 2007 Uwe Hermann ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, write to the Free Software ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## ## XIP_ROM_SIZE must be a power of 2. default XIP_ROM_SIZE = 64 * 1024 include /config/nofailovercalculation.lb arch i386 end driver mainboard.o if HAVE_PIRQ_TABLE object irq_tables.o end # object reset.o makerule ./failover.E depends "$(MAINBOARD)/../../../arch/i386/lib/failover.c ../romcc" action "../romcc -E -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/../../../arch/i386/lib/failover.c -o $@" end makerule ./failover.inc depends "$(MAINBOARD)/../../../arch/i386/lib/failover.c ../romcc" action "../romcc -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/../../../arch/i386/lib/failover.c -o $@" end makerule ./auto.E # depends "$(MAINBOARD)/auto.c option_table.h ../romcc" depends "$(MAINBOARD)/auto.c ../romcc" action "../romcc -E -mcpu=p2 -O -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@" end makerule ./auto.inc # depends "$(MAINBOARD)/auto.c option_table.h ../romcc" depends "$(MAINBOARD)/auto.c ../romcc" action "../romcc -mcpu=p2 -O -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@" end mainboardinit cpu/x86/16bit/entry16.inc mainboardinit cpu/x86/32bit/entry32.inc ldscript /cpu/x86/16bit/entry16.lds ldscript /cpu/x86/32bit/entry32.lds if USE_FALLBACK_IMAGE mainboardinit cpu/x86/16bit/reset16.inc ldscript /cpu/x86/16bit/reset16.lds else mainboardinit cpu/x86/32bit/reset32.inc ldscript /cpu/x86/32bit/reset32.lds end mainboardinit arch/i386/lib/cpu_reset.inc mainboardinit arch/i386/lib/id.inc ldscript /arch/i386/lib/id.lds if USE_FALLBACK_IMAGE ldscript /arch/i386/lib/failover.lds mainboardinit ./failover.inc end mainboardinit cpu/x86/fpu/enable_fpu.inc mainboardinit cpu/x86/mmx/enable_mmx.inc mainboardinit ./auto.inc mainboardinit cpu/x86/mmx/disable_mmx.inc dir /pc80 config chip.h chip northbridge/intel/i82810 # Northbridge device apic_cluster 0 on # APIC cluster chip cpu/intel/socket_PGA370 # CPU device apic 0 on end # APIC end end device pci_domain 0 on device pci 0.0 on end # Host bridge device pci 1.0 off # Onboard video # chip drivers/pci/onboard # device pci 1.0 on end # register "rom_address" = "0xfff80000" # end end chip southbridge/intel/i82801xx # Southbridge register "ide0_enable" = "1" register "ide1_enable" = "1" device pci 1e.0 on end # PCI bridge device pci 1f.0 on # ISA/LPC bridge chip superio/winbond/w83627hf # Super I/O device pnp 2e.0 on # Floppy io 0x60 = 0x3f0 irq 0x70 = 6 drq 0x74 = 2 end device pnp 2e.1 on # Parallel port io 0x60 = 0x378 irq 0x70 = 7 drq 0x74 = 3 end device pnp 2e.2 on # Com1 io 0x60 = 0x3f8 irq 0x70 = 4 end device pnp 2e.3 on # Com2 (only header on board) io 0x60 = 0x2f8 irq 0x70 = 3 end device pnp 2e.5 on # PS/2 keyboard/mouse io 0x60 = 0x60 io 0x62 = 0x64 irq 0x70 = 1 # Keyboard interrupt irq 0x72 = 12 # Mouse interrupt end device pnp 2e.6 on end # Consumer IR (TODO) device pnp 2e.7 on # Game port / MIDI / GPIO 1 io 0x60 = 0x201 io 0x62 = 0x330 irq 0x70 = 9 end device pnp 2e.8 on end # GPIO 2 device pnp 2e.9 on end # GPIO 3 device pnp 2e.a on end # ACPI device pnp 2e.b on # Hardware monitor io 0x60 = 0x290 irq 0x70 = 5 end end end device pci 1f.1 on end # IDE device pci 1f.2 on end # USB device pci 1f.3 on end # SMBus device pci 1f.5 on end # AC'97 audio device pci 1f.6 on end # AC'97 modem end end end