; bdiGDB configuration file for the Sandpoint X3 evaluation system ; with the Altimus 7410 PMC ;----------------------------------------------------------------- ; [INIT] ; init core register WREG MSR 0x00000000 ;clear MSR ; ; init memory controller (based on DINK32) WM32 0xFEC00000 0x46000080 ;select PCIARB WM16 0xFEE00002 0x0080 ; WM32 0xFEC00000 0x73000080 ;select ODCR WM8 0xFEE00003 0xd1 ; WM32 0xFEC00000 0x74000080 ;select CDCR WM16 0xFEE00000 0x00fd ; WM32 0xFEC00000 0x76000080 ;select MICR WM8 0xFEE00002 0x40 ; WM32 0xFEC00000 0x80000080 ;select MSAR1 WM32 0xFEE00000 0x0080a0c0 ; WM32 0xFEC00000 0x84000080 ;select MSAR2 WM32 0xFEE00000 0xe0002040 ; WM32 0xFEC00000 0x88000080 ;select MSAR3 WM32 0xFEE00000 0x00000000 ; WM32 0xFEC00000 0x8c000080 ;select MSAR4 WM32 0xFEE00000 0x00010101 ; WM32 0xFEC00000 0x90000080 ;select MEAR1 WM32 0xFEE00000 0x7f9fbfdf ; WM32 0xFEC00000 0x94000080 ;select MEAR2 WM32 0xFEE00000 0xff1f3f5f ; WM32 0xFEC00000 0x98000080 ;select MEAR3 WM32 0xFEE00000 0x00000000 ; WM32 0xFEC00000 0x9c000080 ;select MEAR4 WM32 0xFEE00000 0x00010101 ; WM32 0xFEC00000 0xa0000080 ;select MBEN WM8 0xFEE00000 0x01 ; WM32 0xFEC00000 0xa3000080 ;select PGMAX WM8 0xFEE00003 0x32 ; WM32 0xFEC00000 0xa8000080 ;select PIC1 WM32 0xFEE00000 0x981a14ff ; WM32 0xFEC00000 0xac000080 ;select PIC2 WM32 0xFEE00000 0x00000004 ; WM32 0xFEC00000 0xe0000080 ;select AMBOR WM8 0xFEE00000 0xc0 ; WM32 0xFEC00000 0xf0000080 ;select MCCR1 WM32 0xFEE00000 0xaaaae075 ;do not set MEMGO WM32 0xFEC00000 0xf4000080 ;select MCCR2 WM32 0xFEE00000 0x2c184004 ; WM32 0xFEC00000 0xf8000080 ;select MCCR3 WM32 0xFEE00000 0x00003078 ; WM32 0xFEC00000 0xfc000080 ;select MCCR4 WM32 0xFEE00000 0x39223235 ; DELAY 100 WM32 0xFEC00000 0xf0000080 ;select MCCR1 WM32 0xFEE00000 0xaaaae875 ;now set MEMGO ; WM32 0xFEC00000 0x78000080 ;select EUMBBAR WM32 0xFEE00000 0x000000fc ;Embedded utility memory block at 0xFC000000 ; ;WM32 0xFEC00000 0xa8000080 ;select PICR1 ;WM32 0xFEE00000 0x901014ff ;enable flash write (Flash on processor bus) ; ; Enable UART0 ; WM8 0xFE00015C 0x07 WM8 0xFE00015D 0x06 WM8 0xFE00015C 0x30 WM8 0xFE00015D 0x00 WM8 0xFE00015C 0x60 WM8 0xFE00015D 0x03 WM8 0xFE00015C 0x61 WM8 0xFE00015D 0xf8 WM8 0xFE00015C 0x30 WM8 0xFE00015D 0x01 ; ; define maximal transfer size ;TSZ1 0xFF800000 0xFFFFFFFF ;ROM space (only for PCI boot ROM) TSZ4 0xFF800000 0xFFFFFFFF ;ROM space (only for Local bus flash) [TARGET] CPUTYPE 7400 ;the CPU type (603EV,750,8240,8260,7400) JTAGCLOCK 0 ;use 16 MHz JTAG clock WORKSPACE 0x00000000 ;workspace in target RAM for data cache flush BDIMODE AGENT ;the BDI working mode (LOADONLY | AGENT | GATEWAY) BREAKMODE HARD ;SOFT or HARD, HARD uses PPC hardware breakpoint ;STEPMODE HWBP ;TRACE or HWBP, HWPB uses a hardware breakpoint ;VECTOR CATCH ;catch unhandled exceptions DCACHE NOFLUSH ;data cache flushing (FLUSH | NOFLUSH) ;PARITY ON ;enable data parity generation MEMDELAY 400 ;additional memory access delay ;REGLIST STD ;select register to transfer to GDB ;L2PM 0x00100000 0x80000 ;L2 privat memory ;SIO 2002 115200 SIO 2002 9600 ;MMU XLAT ;PTBASE 0x000000f0 [HOST] IP 10.0.1.11 ;FILE E:\cygnus\root\usr\demo\sp7400\vxworks FILE coreboot.elf FORMAT ELF ;START 0x403104 LOAD MANUAL ;load code MANUAL or AUTO after reset DEBUGPORT 2001 [FLASH] ; Am29LV800BB on local processor bus (RCS0) ; set PPMC7410 switch SW2-1 OFF => ROM on Local bus ; enable flash write in PICR1 (see INIT part) ; set maximal transfer size to 4 bytes (see INIT part) CHIPTYPE AM29BX8 ;Flash type (AM29F | AM29BX8 | AM29BX16 | I28BX8 | I28BX16) CHIPSIZE 0x100000 ;The size of one flash chip in bytes (e.g. Am29LV800BB = 0x100000) BUSWIDTH 8 ;The width of the flash memory bus in bits (8 | 16 | 32 | 64) WORKSPACE 0x00000000 ;workspace in SDRAM FILE coreboot.elf FORMAT ELF ERASE 0xFFF00000 ;erase sector 0 of flash ERASE 0xFFF04000 ;erase sector 1 of flash ERASE 0xFFF06000 ;erase sector 2 of flash ERASE 0xFFF08000 ;erase sector 3 of flash ERASE 0xFFF10000 ;erase sector 4 of flash ERASE 0xFFF20000 ;erase sector 5 of flash ERASE 0xFFF30000 ;erase sector 6 of flash ERASE 0xFFF40000 ;erase sector 7 of flash ERASE 0xFFF50000 ;erase sector 8 of flash ERASE 0xFFF60000 ;erase sector 9 of flash ERASE 0xFFF70000 ;erase sector 10 of flash [REGS] DMM1 0xFC000000 ;Embedded utility memory base address IMM1 0xFEC00000 0xFEE00000 ;configuration registers at byte offset 0 IMM2 0xFEC00000 0xFEE00001 ;configuration registers at byte offset 1 IMM3 0xFEC00000 0xFEE00002 ;configuration registers at byte offset 2 IMM4 0xFEC00000 0xFEE00003 ;configuration registers at byte offset 3 FILE mpc107.def