chip northbridge/intel/sandybridge # IGD Displays register "gfx" = "GMA_STATIC_DISPLAYS(1)" # Enable DisplayPort Hotplug with 6ms pulse register "gpu_dp_d_hotplug" = "0x06" # Enable Panel as LVDS and configure power delays register "gpu_panel_port_select" = "PANEL_PORT_LVDS" register "gpu_panel_power_cycle_delay" = "1" register "gpu_panel_power_up_delay" = "300" # T1+T2: 30ms register "gpu_panel_power_down_delay" = "300" # T5+T6: 30ms register "gpu_panel_power_backlight_on_delay" = "2000" # T3: 200ms register "gpu_panel_power_backlight_off_delay" = "2000" # T4: 200ms register "gpu_cpu_backlight" = "0x1155" register "gpu_pch_backlight" = "0x06100610" register "spd_addresses" = "{0x50, 0, 0x51, 0}" chip cpu/intel/model_206ax # Values obtained from vendor BIOS register "pp0_psi[VR12_PSI2]" = "{VR12_ALL_PHASES, 5}" register "pp0_psi[VR12_PSI3]" = "{VR12_ALL_PHASES, 1}" register "pp1_psi[VR12_PSI2]" = "{VR12_ALL_PHASES, 5}" register "pp1_psi[VR12_PSI3]" = "{VR12_ALL_PHASES, 1}" device cpu_cluster 0 on end end device domain 0 on subsystemid 0x17aa 0x21ce inherit device ref host_bridge on end # host bridge device ref peg10 on end # PCIe Bridge for discrete graphics device ref igd on end # Integrated Graphics Controller chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH # GPI routing # 0 No effect (default) # 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set) # 2 SCI (if corresponding GPIO_EN bit is also set) register "alt_gp_smi_en" = "0x0000" register "gpi1_routing" = "2" register "gpi13_routing" = "2" # Enable SATA ports 0 (HDD bay) & 1 (ODD bay) & 2 (mSATA) & 3 (eSATA) & 4 (dock) register "sata_port_map" = "0x1f" # Set max SATA speed to 6.0 Gb/s register "sata_interface_speed_support" = "0x3" register "gen1_dec" = "0x7c1601" register "gen2_dec" = "0x0c15e1" register "gen4_dec" = "0x0c06a1" register "pcie_hotplug_map" = "{ 0, 0, 0, 1, 0, 0, 0, 0 }" # Enable zero-based linear PCIe root port functions register "pcie_port_coalesce" = "true" # device specific SPI configuration register "spi_uvscc" = "0x2005" register "spi_lvscc" = "0x2005" # OC3 set in BIOS to port 2-7, OC7 set in BIOS to port 10-13 register "usb_port_config" = "{ {1, 1, 0}, /* P0: system port 4, OC0 */ {1, 1, 1}, /* P1: system port 2 (EHCI debug), OC 1 */ {1, 1, -1}, /* P2: HALF MINICARD (WLAN) no oc */ {1, 0, -1}, /* P3: WWAN, no OC */ {1, 0, -1}, /* P4: smartcard, no OC */ {1, 1, -1}, /* P5: ExpressCard, no OC */ {0, 0, -1}, /* P6: empty */ {0, 0, -1}, /* P7: empty */ {1, 1, 4}, /* P8: system port 3, OC4*/ {1, 1, 5}, /* P9: system port 1 (EHCI debug), OC 5 */ {1, 0, -1}, /* P10: fingerprint reader, no OC */ {1, 0, -1}, /* P11: bluetooth, no OC. */ {1, 1, -1}, /* P12: docking, no OC */ {1, 1, -1} /* P13: camera (LCD), no OC */ }" device ref mei1 on end # Management Engine Interface 1 device ref mei2 off end # Management Engine Interface 2 device ref me_ide_r off end # Management Engine IDE-R device ref me_kt off end # Management Engine KT device ref gbe on end # Intel Gigabit Ethernet device ref ehci2 on end # USB Enhanced Host Controller #2 device ref hda on end # High Definition Audio Controller device ref pcie_rp1 off end # PCIe Port #1 device ref pcie_rp2 on end # PCIe Port #2 Integrated Wireless LAN device ref pcie_rp3 off end # PCIe Port #3 device ref pcie_rp4 on smbios_slot_desc "7" "3" "ExpressCard Slot" "8" end # PCIe Port #4 ExpressCard device ref pcie_rp5 on chip drivers/ricoh/rce822 register "sdwppol" = "1" register "disable_mask" = "0x87" device pci 00.0 on end end end # PCIe Port #5 (Ricoh SD & FW) device ref pcie_rp6 off end # PCIe Port #6 Intel Gigabit Ethernet PHY (not PCIe) device ref pcie_rp7 off end # PCIe Port #7 device ref pcie_rp8 off end # PCIe Port #8 device ref ehci1 on end # USB Enhanced Host Controller #1 device ref pci_bridge off end # PCI bridge device ref lpc on chip ec/lenovo/pmh7 device pnp ff.1 on end # dummy register "backlight_enable" = "true" register "dock_event_enable" = "true" end chip drivers/pc80/tpm device pnp 0c31.0 on end end chip ec/lenovo/h8 device pnp ff.2 on # dummy io 0x60 = 0x62 io 0x62 = 0x66 io 0x64 = 0x1600 io 0x66 = 0x1604 end register "config0" = "0xa7" register "config1" = "0x01" register "config2" = "0xa0" register "config3" = "0xe2" register "has_keyboard_backlight" = "0" register "beepmask0" = "0x02" register "beepmask1" = "0x86" register "has_power_management_beeps" = "1" register "event2_enable" = "0xff" register "event3_enable" = "0xff" register "event4_enable" = "0xf0" register "event5_enable" = "0x3c" register "event6_enable" = "0x00" register "event7_enable" = "0xa1" register "event8_enable" = "0x7b" register "event9_enable" = "0xff" register "eventa_enable" = "0x00" register "eventb_enable" = "0x00" register "eventc_enable" = "0xff" register "eventd_enable" = "0xff" register "evente_enable" = "0x0d" register "has_bdc_detection" = "1" register "bdc_gpio_num" = "54" register "bdc_gpio_lvl" = "0" end chip drivers/lenovo/hybrid_graphics device pnp ff.f on end # dummy register "detect_gpio" = "21" register "has_panel_hybrid_gpio" = "1" register "panel_hybrid_gpio" = "52" register "panel_integrated_lvl" = "1" register "has_backlight_gpio" = "0" register "has_dgpu_power_gpio" = "0" register "has_thinker1" = "1" end end # LPC Controller device ref sata1 on end # 6 port SATA AHCI Controller device ref smbus on # eeprom, 8 virtual devices, same chip chip drivers/i2c/at24rf08c device i2c 54 on end device i2c 55 on end device i2c 56 on end device i2c 57 on end device i2c 5c on end device i2c 5d on end device i2c 5e on end device i2c 5f on end end end # SMBus Controller device ref sata2 off end # SATA Controller 2 device ref thermal on end # Thermal end end end