FLASH@0xff400000 0xc00000 {
	SI_ALL@0x0 0x500000 {
		SI_DESC@0x0 0x1000
		SI_GBE@0x1000 0x2000
		SI_ME
	}
	SI_BIOS@0x500000 0x700000 {
		RW_SECTION_A 0x280000 {
			VBLOCK_A 0x10000
			FW_MAIN_A(CBFS)
			RW_FWID_A 0x40
		}
		RW_SECTION_B 0x280000 {
			VBLOCK_B 0x10000
			FW_MAIN_B(CBFS)
			RW_FWID_B 0x40
		}
		UNIFIED_MRC_CACHE@0x500000 0x20000 {
			RECOVERY_MRC_CACHE@0x0 0x10000
			RW_MRC_CACHE@0x10000 0x10000
		}
		RW_NVRAM(PRESERVE) 0x2000
		RW_VPD(PRESERVE) 0x1000
		SMMSTORE(PRESERVE)@0x523000 0x40000

		WP_RO {
			FMAP 0x800
			RO_FRID 0x40
			RO_PADDING 0x7c0
			RO_VPD(PRESERVE) 0x1000
			GBB 0x1e000
			COREBOOT(CBFS)
		}
	}
}