chip northbridge/intel/sandybridge # IGD Displays register "gfx" = "GMA_STATIC_DISPLAYS(0)" # Enable DisplayPort 1 Hotplug with 6ms pulse register "gpu_dp_d_hotplug" = "0x06" # Enable DisplayPort 0 Hotplug with 6ms pulse register "gpu_dp_c_hotplug" = "0x06" # Enable DVI Hotplug with 6ms pulse register "gpu_dp_b_hotplug" = "0x06" register "max_mem_clock_mhz" = "800" register "spd_addresses" = "{0x50, 0, 0x52, 0}" chip cpu/intel/model_206ax device cpu_cluster 0 on end register "acpi_c1" = "CPU_ACPI_C3" register "acpi_c2" = "CPU_ACPI_C6" end device domain 0 on device ref host_bridge on end # host bridge device ref igd on end # vga controller chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH # GPI routing # 0 No effect (default) # 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set) # 2 SCI (if corresponding GPIO_EN bit is also set) register "gpi1_routing" = "1" register "gpi14_routing" = "2" register "alt_gp_smi_en" = "0x0002" register "gpe0_en" = "0x4000" register "sata_port_map" = "0x3f" register "gen1_dec" = "0x00fc1601" # runtime_port registers register "gen2_dec" = "0x000c0181" # SuperIO range is 0x700-0x73f register "gen3_dec" = "0x003c0701" register "usb_port_config" = "{ { 1, 0, 0 }, /* P0: Front port (OC0) */ { 1, 0, 1 }, /* P1: Back port (OC1) */ { 1, 0, -1 }, /* P2: MINIPCIE1 (no OC) */ { 1, 0, -1 }, /* P3: MMC (no OC) */ { 1, 0, 2 }, /* P4: Front port (OC2) */ { 0, 0, -1 }, /* P5: Empty */ { 0, 0, -1 }, /* P6: Empty */ { 0, 0, -1 }, /* P7: Empty */ { 1, 0, 4 }, /* P8: Back port (OC4) */ { 1, 0, -1 }, /* P9: MINIPCIE3 (no OC) */ { 1, 0, -1 }, /* P10: BLUETOOTH (no OC) */ { 0, 0, -1 }, /* P11: Empty */ { 1, 0, 6 }, /* P12: Back port (OC6) */ { 1, 0, 5 }, /* P13: Back port (OC5) */ }" device ref mei1 on end # Management Engine Interface 1 device ref mei2 off end # Management Engine Interface 2 device ref me_ide_r off end # Management Engine IDE-R device ref me_kt off end # Management Engine KT device ref gbe off end # Intel Gigabit Ethernet device ref ehci2 on end # USB2 EHCI #2 device ref hda on end # High Definition Audio device ref pcie_rp1 on end # PCIe Port #1 (WLAN) device ref pcie_rp2 off end # PCIe Port #2 device ref pcie_rp3 on end # PCIe Port #3 (Debug) device ref pcie_rp4 on end # PCIe Port #4 (LAN) device ref pcie_rp5 off end # PCIe Port #5 device ref pcie_rp6 off end # PCIe Port #6 device ref pcie_rp7 off end # PCIe Port #7 device ref pcie_rp8 off end # PCIe Port #8 device ref ehci1 on end # USB2 EHCI #1 device ref pci_bridge off end # PCI bridge device ref lpc on end # LPC bridge device ref sata1 on end # SATA Controller 1 device ref smbus on end # SMBus device ref sata2 off end # SATA Controller 2 device ref thermal on end # Thermal end end end