## SPDX-License-Identifier: GPL-2.0-only chip northbridge/intel/sandybridge register "gfx.use_spread_spectrum_clock" = "0" register "gpu_dp_b_hotplug" = "0" register "gpu_dp_c_hotplug" = "0" register "gpu_dp_d_hotplug" = "0" # BTX mainboard: Reversed mapping register "spd_addresses" = "{0x53, 0x52, 0x51, 0x50}" device domain 0 on subsystemid 0x103c 0x1791 inherit device ref host_bridge on end device ref peg10 on end device ref igd on end device ref peg60 off end chip southbridge/intel/bd82x6x # Intel Series 7 PCH register "docking_supported" = "0" register "gen1_dec" = "0x00fc0601" register "gen2_dec" = "0x00fc0801" register "pcie_hotplug_map" = "{ 0, 0, 0, 0, 0, 0, 0, 0 }" register "pcie_port_coalesce" = "true" register "sata_interface_speed_support" = "0x3" register "spi_lvscc" = "0x2005" register "spi_uvscc" = "0x2005" register "superspeed_capable_ports" = "0x0000000f" register "xhci_switchable_ports" = "0x0000000f" register "xhci_overcurrent_mapping" = "0x0000000f" device ref xhci on end device ref mei1 on end device ref mei2 off end device ref me_ide_r off end device ref me_kt on end device ref gbe on end device ref ehci2 on end device ref hda on end device ref pcie_rp1 on end device ref pcie_rp2 off end device ref pcie_rp3 off end device ref pcie_rp4 off end device ref pcie_rp5 on end device ref pcie_rp6 off end device ref pcie_rp7 off end device ref pcie_rp8 off end device ref ehci1 on end device ref pci_bridge on end device ref lpc on chip superio/common device pnp 2e.ff on # passes SIO base addr to SSDT gen chip superio/nuvoton/npcd378 device pnp 2e.0 off end # Floppy device pnp 2e.1 on # Parallel port # global # serialice: Vendor writes: irq 0x14 = 0x9c irq 0x1c = 0xa8 irq 0x1d = 0x08 irq 0x22 = 0x3f irq 0x1a = 0xb0 # dumped from superiotool: irq 0x1b = 0x1e irq 0x27 = 0x08 irq 0x2a = 0x20 irq 0x2d = 0x01 # parallel port io 0x60 = 0x378 irq 0x70 = 0x07 drq 0x74 = 0x01 end device pnp 2e.2 off # COM1 io 0x60 = 0x2f8 irq 0x70 = 3 end device pnp 2e.3 on # COM2, IR io 0x60 = 0x3f8 irq 0x70 = 4 end device pnp 2e.4 on # LED control io 0x60 = 0x600 # IOBASE[0h] = bit0 LED red / green # IOBASE[0h] = bit1-4 LED PWM duty cycle # IOBASE[1h] = bit6 SWCC io 0x62 = 0x610 # IOBASE [0h] = GPES # IOBASE [1h] = GPEE # IOBASE [4h:7h] = 32bit upcounter at 1Mhz # IOBASE [8h:bh] = GPS # IOBASE [ch:fh] = GPE end device pnp 2e.5 on # Mouse irq 0x70 = 0xc end device pnp 2e.6 on # Keyboard io 0x60 = 0x0060 io 0x62 = 0x0064 irq 0x70 = 0x01 # serialice: Vendor writes: drq 0xf0 = 0x40 end device pnp 2e.7 on # WDT ? io 0x60 = 0x620 end device pnp 2e.8 on # HWM io 0x60 = 0x800 # IOBASE[0h:feh] HWM page # IOBASE[ffh] bit0-bit3 page selector drq 0xf0 = 0x20 drq 0xf1 = 0x01 drq 0xf2 = 0x40 drq 0xf3 = 0x01 drq 0xf4 = 0x66 drq 0xf5 = 0x67 drq 0xf6 = 0x66 drq 0xf7 = 0x01 end device pnp 2e.f on # GPIO OD ? drq 0xf1 = 0x97 drq 0xf2 = 0x01 drq 0xf5 = 0x08 drq 0xfe = 0x80 end device pnp 2e.15 on # BUS ? io 0x60 = 0x0680 io 0x62 = 0x0690 end device pnp 2e.1c on # Suspend Control ? io 0x60 = 0x640 # writing to IOBASE[5h] # 0x0: Power off # 0x9: Power off and bricked until CMOS battery removed end device pnp 2e.1e on # GPIO ? io 0x60 = 0x660 drq 0xf4 = 0x01 # skip the following, as it # looks like remapped registers #drq 0xf5 = 0x06 #drq 0xf6 = 0x60 #drq 0xfe = 0x03 end end end end chip drivers/pc80/tpm device pnp 4e.0 on end # TPM module end end device ref sata1 on end device ref smbus on end device ref sata2 off end device ref thermal off end end end end