# # This file is part of the coreboot project. # # # SPDX-License-Identifier: GPL-2.0-only chip northbridge/amd/agesa/family16kb/root_complex device cpu_cluster 0 on chip cpu/amd/agesa/family16kb device lapic 0 on end end end device domain 0 on subsystemid 0x1022 0x1410 inherit chip northbridge/amd/agesa/family16kb device pci 0.0 on end # Root Complex device pci 1.0 on end # Internal Graphics P2P bridge 0x9804 device pci 1.1 on end # Internal Multimedia device pci 2.0 on end # PCIe Host Bridge device pci 2.1 off end # unused device pci 2.2 on end # GPP0: NIC device pci 2.3 on end # GPP1: NIC device pci 2.4 off end # GPP2: unused device pci 2.5 off end # GPP3: unused end #chip northbridge/amd/agesa/family16kb chip southbridge/amd/agesa/hudson # it is under NB/SB Link, but on the same pci bus device pci 11.0 on end # SATA device pci 12.0 on end # USB device pci 12.2 on end # USB device pci 13.0 on end # USB device pci 13.2 on end # USB device pci 14.0 on end # SM device pci 14.2 off end # HDA 0x4383 device pci 14.3 on # LPC 0x439d chip superio/nuvoton/nct5104d device pnp 4e.0 off end # FDC device pnp 4e.2 on # COM1 io 0x60 = 0x3f8 irq 0x70 = 4 end device pnp 4e.3 on # COM2 io 0x60 = 0x2f8 irq 0x70 = 3 end device pnp 4e.7 off end # GPIO device pnp 4e.8 off end # GPIO/WDT device pnp 4e.f off end # GPIO device pnp 4e.10 off end # COM3 used by port 80 device pnp 4e.11 on # COM4 io 0x60 = 0x2e8 irq 0x70 = 3 end device pnp 4e.14 off end # PORT80 register "irq_trigger_type" = "0" # 0 edge, 1 level end # nct5104d end #LPC device pci 14.7 off end # SD device pci 16.0 on end # USB device pci 16.2 on end # USB end #chip southbridge/amd/agesa/hudson chip northbridge/amd/agesa/family16kb device pci 18.0 on end device pci 18.1 on end device pci 18.2 on end device pci 18.3 on end device pci 18.4 on end device pci 18.5 on end register "spdAddrLookup" = " { { {0xA0, 0x00}, {0x00, 0x00}, }, // socket 0 - Channel 0 - 8-bit SPD addresses }" end end #domain end #northbridge/amd/agesa/family16kb/root_complex