chip soc/intel/tigerlake register "DdiPort1Hpd" = "0" register "DdiPort2Hpd" = "0" register "tcc_offset" = "5" # TCC of 95 register "power_limits_config[POWER_LIMITS_U_2_CORE]" = "{ .tdp_pl1_override = 18, .tdp_pl2_override = 51, .tdp_pl4 = 71, }" register "power_limits_config[POWER_LIMITS_U_4_CORE]" = "{ .tdp_pl1_override = 18, .tdp_pl2_override = 51, .tdp_pl4 = 105, }" # Disable SRCCLKREQ1# register "PcieClkSrcUsage[1]" = "PCIE_CLK_NOTUSED" device domain 0 on device ref dptf on chip drivers/intel/dptf ## Active Policy register "policies.active" = "{ [0] = {.target = DPTF_CPU, .thresholds = {TEMP_PCT(94, 100),}}, [1] = {.target = DPTF_TEMP_SENSOR_2, .thresholds = {TEMP_PCT(64, 100), TEMP_PCT(60, 90), TEMP_PCT(56, 80), TEMP_PCT(52, 70), TEMP_PCT(48, 60), TEMP_PCT(44, 50), TEMP_PCT(40, 40),}}}" ## Passive Policy register "policies.passive" = "{ [0] = DPTF_PASSIVE(CPU, CPU, 95, 5000), [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 65, 6000), [2] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_0, 65, 6000), [3] = DPTF_PASSIVE(CPU, TEMP_SENSOR_2, 54, 6000), [4] = DPTF_PASSIVE(CPU, TEMP_SENSOR_3, 65, 6000)}" ## Critical Policy register "policies.critical" = "{ [0] = DPTF_CRITICAL(CPU, 100, SHUTDOWN), [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 75, SHUTDOWN), [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 75, SHUTDOWN), [3] = DPTF_CRITICAL(TEMP_SENSOR_2, 75, SHUTDOWN), [4] = DPTF_CRITICAL(TEMP_SENSOR_3, 75, SHUTDOWN)}" ## Power Limits Control # 12-18W PL1 in 200mW increments, avg over 28-32s interval # PL2 is fixed at 51W, avg over 28-32s interval register "controls.power_limits" = "{ .pl1 = {.min_power = 12000, .max_power = 18000, .time_window_min = 28 * MSECS_PER_SEC, .time_window_max = 32 * MSECS_PER_SEC, .granularity = 200,}, .pl2 = {.min_power = 15000, .max_power = 51000, .time_window_min = 28 * MSECS_PER_SEC, .time_window_max = 32 * MSECS_PER_SEC, .granularity = 1000,}}" device generic 0 on end end end device ref i2c0 on chip drivers/i2c/generic register "hid" = ""10EC5682"" register "name" = ""RT58"" register "desc" = ""Headset Codec"" register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_F8)" # Set the jd_src to RT5668_JD1 for jack detection register "property_count" = "1" register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER" register "property_list[0].name" = ""realtek,jd-src"" register "property_list[0].integer" = "1" device i2c 1a on end end chip drivers/i2c/max98373 register "vmon_slot_no" = "0" register "imon_slot_no" = "1" register "uid" = "0" register "desc" = ""Right Speaker Amp"" register "name" = ""MAXR"" device i2c 31 on end end chip drivers/i2c/max98373 register "vmon_slot_no" = "2" register "imon_slot_no" = "3" register "uid" = "1" register "desc" = ""Left Speaker Amp"" register "name" = ""MAXL"" device i2c 32 on end end end device ref i2c1 on chip drivers/i2c/hid register "generic.hid" = ""GDIX0000"" register "generic.desc" = ""Goodix Touchscreen"" register "generic.irq" = "ACPI_IRQ_EDGE_LOW(GPP_E7_IRQ)" register "generic.probed" = "1" register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C10)" register "generic.reset_delay_ms" = "120" register "generic.reset_off_delay_ms" = "3" register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A8)" register "generic.enable_delay_ms" = "12" register "generic.has_power_resource" = "1" register "hid_desc_reg_offset" = "0x01" device i2c 14 on end end chip drivers/i2c/hid register "generic.hid" = ""ELAN90FC"" register "generic.desc" = ""ELAN Touchscreen"" register "generic.irq" = "ACPI_IRQ_EDGE_LOW(GPP_E7_IRQ)" register "generic.probed" = "1" register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C10)" register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A8)" register "generic.reset_delay_ms" = "20" register "generic.has_power_resource" = "1" register "generic.disable_gpio_export_in_crs" = "1" register "hid_desc_reg_offset" = "0x01" device i2c 10 on end end chip drivers/i2c/generic register "hid" = ""RAYD0001"" register "desc" = ""Raydium Touchscreen"" register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_E7_IRQ)" register "probed" = "1" register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C10)" register "reset_delay_ms" = "1" register "reset_off_delay_ms" = "2" register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A8)" register "enable_delay_ms" = "10" register "enable_off_delay_ms" = "1" register "has_power_resource" = "1" device i2c 39 on end end end device ref i2c2 on chip drivers/i2c/sx9310 register "desc" = ""SAR0 Proximity Sensor"" register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_F14_IRQ)" register "speed" = "I2C_SPEED_FAST" register "uid" = "0" register "reg_prox_ctrl0" = "0x10" register "reg_prox_ctrl1" = "0x00" register "reg_prox_ctrl2" = "0x84" register "reg_prox_ctrl3" = "0x0e" register "reg_prox_ctrl4" = "0x07" register "reg_prox_ctrl5" = "0xc6" register "reg_prox_ctrl6" = "0x20" register "reg_prox_ctrl7" = "0x0d" register "reg_prox_ctrl8" = "0x8d" register "reg_prox_ctrl9" = "0x43" register "reg_prox_ctrl10" = "0x1f" register "reg_prox_ctrl11" = "0x00" register "reg_prox_ctrl12" = "0x00" register "reg_prox_ctrl13" = "0x00" register "reg_prox_ctrl14" = "0x00" register "reg_prox_ctrl15" = "0x00" register "reg_prox_ctrl16" = "0x00" register "reg_prox_ctrl17" = "0x00" register "reg_prox_ctrl18" = "0x00" register "reg_prox_ctrl19" = "0x00" register "reg_sar_ctrl0" = "0x50" register "reg_sar_ctrl1" = "0x8a" register "reg_sar_ctrl2" = "0x3c" device i2c 28 on end end end device ref i2c5 on chip drivers/i2c/generic register "hid" = ""ELAN0000"" register "desc" = ""ELAN Touchpad"" register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_E15_IRQ)" register "wake" = "GPE0_DW2_15" register "probed" = "1" device i2c 15 on end end end device ref pmc hidden # The pmc_mux chip driver is a placeholder for the # PMC.MUX device in the ACPI hierarchy. chip drivers/intel/pmc_mux device generic 0 on chip drivers/intel/pmc_mux/conn register "usb2_port_number" = "9" register "usb3_port_number" = "1" # SBU is fixed, HSL follows CC register "sbu_orientation" = "TYPEC_ORIENTATION_NORMAL" device generic 0 on end end chip drivers/intel/pmc_mux/conn register "usb2_port_number" = "4" register "usb3_port_number" = "2" # SBU is fixed, HSL follows CC register "sbu_orientation" = "TYPEC_ORIENTATION_NORMAL" device generic 1 on end end end end end end end