chip soc/intel/tigerlake register "DdiPort1Hpd" = "0" register "DdiPort2Hpd" = "0" #+-------------------+---------------------------+ #| Field | Value | #+-------------------+---------------------------+ #| chipset_lockdown | CHIPSET_LOCKDOWN_COREBOOT | #| GSPI0 | cr50 TPM. Early init is | #| | required to set up a BAR | #| | for TPM communication | #| | before memory is up | #| I2C0 | Audio | #| I2C1 | Touchscreen | #| I2C2 | WLAN, SAR0 | #| I2C3 | Camera, SAR1 | #| I2C5 | Trackpad | #+-------------------+---------------------------+ register "common_soc_config" = "{ .chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT, .gspi[0] = { .speed_mhz = 1, .early_init = 1, }, .i2c[0] = { .speed = I2C_SPEED_FAST, }, .i2c[1] = { .speed = I2C_SPEED_FAST, }, .i2c[2] = { .speed = I2C_SPEED_FAST, }, .i2c[3] = { .speed = I2C_SPEED_FAST, }, .i2c[5] = { .speed = I2C_SPEED_FAST, .speed_config[0] = { .speed = I2C_SPEED_FAST, .scl_lcnt = 163, .scl_hcnt = 75, .sda_hold = 36, }, }, }" #These settings improve the USB2 Port1 eye diagram register "usb2_ports[3]" = "{ .enable = 1, .tx_bias = USB2_BIAS_28P15MV, .tx_emp_enable = USB2_PRE_EMP_ON, .pre_emp_bias = USB2_BIAS_56P3MV, .pre_emp_bit = USB2_HALF_BIT_PRE_EMP, .type_c = 1, }" register "usb2_ports[8]" = "USB2_PORT_TYPE_C(OC_SKIP)" # Acoustic settings register "AcousticNoiseMitigation" = "1" register "SlowSlewRate[VR_DOMAIN_IA]" = "SLEW_FAST_8" register "SlowSlewRate[VR_DOMAIN_GT]" = "SLEW_FAST_8" register "SlowSlewRate[VR_DOMAIN_SA]" = "SLEW_FAST_8" register "SlowSlewRate[VR_DOMAIN_VLCC]" = "SLEW_FAST_8" register "FastPkgCRampDisable[VR_DOMAIN_IA]" = "1" register "FastPkgCRampDisable[VR_DOMAIN_GT]" = "1" register "FastPkgCRampDisable[VR_DOMAIN_SA]" = "1" register "FastPkgCRampDisable[VR_DOMAIN_VLCC]" = "1" register "tcc_offset" = "8" register "power_limits_config[POWER_LIMITS_U_4_CORE]" = "{ .tdp_pl1_override = 18, .tdp_pl2_override = 51, .tdp_pl4 = 105, }" device domain 0 on device pci 04.0 on chip drivers/intel/dptf ## Active Policy register "policies.active" = "{ [0] = {.target = DPTF_TEMP_SENSOR_3, .thresholds = {TEMP_PCT(57, 90), TEMP_PCT(47, 80), TEMP_PCT(40, 70), TEMP_PCT(36, 60), TEMP_PCT(34, 50), TEMP_PCT(30, 40),}}}" ## Passive Policy register "policies.passive" = "{ [0] = DPTF_PASSIVE(CPU, CPU, 95, 6000), [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 75, 6000), [2] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_0, 75, 6000), [3] = DPTF_PASSIVE(CPU, TEMP_SENSOR_2, 75, 6000), [4] = DPTF_PASSIVE(CPU, TEMP_SENSOR_3, 75, 6000)}" ## Critical Policy register "policies.critical" = "{ [0] = DPTF_CRITICAL(CPU, 100, SHUTDOWN), [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 80, SHUTDOWN), [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 80, SHUTDOWN), [3] = DPTF_CRITICAL(TEMP_SENSOR_2, 80, SHUTDOWN), [4] = DPTF_CRITICAL(TEMP_SENSOR_3, 80, SHUTDOWN)}" ## Power Limits Control # 12-18W PL1 in 200mW increments, avg over 28-32s interval # PL2 is 51W, avg over 28-32s interval register "controls.power_limits" = "{ .pl1 = {.min_power = 12000, .max_power = 18000, .time_window_min = 28 * MSECS_PER_SEC, .time_window_max = 32 * MSECS_PER_SEC, .granularity = 200,}, .pl2 = {.min_power = 51000, .max_power = 51000, .time_window_min = 28 * MSECS_PER_SEC, .time_window_max = 32 * MSECS_PER_SEC, .granularity = 1000,}}" ## Fan Performance Control (Percent, Speed, Noise, Power) register "controls.fan_perf" = "{ [0] = { 90, 5200, 220, 2200, }, [1] = { 80, 4900, 180, 1800, }, [2] = { 70, 4600, 145, 1450, }, [3] = { 60, 4200, 115, 1150, }, [4] = { 50, 3800, 90, 900, }, [5] = { 40, 3400, 55, 550, }, [6] = { 30, 2900, 30, 300, }, [7] = { 20, 2300, 15, 150, }, [8] = { 10, 1600, 10, 100, }, [9] = { 0, 0, 0, 50, }}" # Fan options register "options.fan.fine_grained_control" = "1" register "options.fan.step_size" = "2" device generic 0 on end end end # DPTF 0x9A03 device ref i2c0 on chip drivers/i2c/generic register "hid" = ""10EC5682"" register "name" = ""RT58"" register "desc" = ""Headset Codec"" register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_F8)" # Set the jd_src to RT5668_JD1 for jack detection register "property_count" = "1" register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER" register "property_list[0].name" = ""realtek,jd-src"" register "property_list[0].integer" = "1" device i2c 1a on end end chip drivers/i2c/max98373 register "vmon_slot_no" = "0" register "imon_slot_no" = "1" register "uid" = "0" register "desc" = ""Right Speaker Amp"" register "name" = ""MAXR"" device i2c 31 on end end chip drivers/i2c/max98373 register "vmon_slot_no" = "2" register "imon_slot_no" = "3" register "uid" = "1" register "desc" = ""Left Speaker Amp"" register "name" = ""MAXL"" device i2c 32 on end end end device ref i2c1 on chip drivers/i2c/hid register "generic.hid" = ""ELAN9008"" register "generic.desc" = ""ELAN Touchscreen"" register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_E7_IRQ)" register "generic.probed" = "1" register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C10)" register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A8)" register "generic.reset_delay_ms" = "20" register "generic.has_power_resource" = "1" register "generic.disable_gpio_export_in_crs" = "1" register "hid_desc_reg_offset" = "0x01" device i2c 10 on end end end device ref i2c5 on chip drivers/i2c/generic register "hid" = ""ELAN0000"" register "desc" = ""ELAN Touchpad"" register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_E15_IRQ)" register "wake" = "GPE0_DW2_15" register "probed" = "1" device i2c 15 on end end end device ref pch_espi on chip ec/google/chromeec use conn0 as mux_conn[0] use conn1 as mux_conn[1] device pnp 0c09.0 on end end end device ref pcie_rp9 on chip soc/intel/common/block/pcie/rtd3 register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_B2)" register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_A11)" register "srcclk_pin" = "0" device generic 0 on end end end device ref pmc hidden # The pmc_mux chip driver is a placeholder for the # PMC.MUX device in the ACPI hierarchy. chip drivers/intel/pmc_mux device generic 0 on chip drivers/intel/pmc_mux/conn register "usb2_port_number" = "9" register "usb3_port_number" = "1" # SBU is fixed, HSL follows CC register "sbu_orientation" = "TYPEC_ORIENTATION_NORMAL" device generic 0 alias conn0 on end end chip drivers/intel/pmc_mux/conn register "usb2_port_number" = "4" register "usb3_port_number" = "2" # SBU is fixed, HSL follows CC register "sbu_orientation" = "TYPEC_ORIENTATION_NORMAL" device generic 1 alias conn1 on end end end end end device ref north_xhci on chip drivers/usb/acpi device ref tcss_root_hub on chip drivers/usb/acpi register "desc" = ""USB3 Type-C Port C0 (MLB)"" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" register "group" = "ACPI_PLD_GROUP(3, 2)" device ref tcss_usb3_port1 on end end chip drivers/usb/acpi register "desc" = ""USB3 Type-C Port C1 (DB)"" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" register "group" = "ACPI_PLD_GROUP(2, 2)" device ref tcss_usb3_port2 on probe DB_USB USB3_ACTIVE end end end end end device ref south_xhci on chip drivers/usb/acpi device ref xhci_root_hub on chip drivers/usb/acpi register "desc" = ""USB2 Type-A Port A0 (MLB)"" register "type" = "UPC_TYPE_A" register "group" = "ACPI_PLD_GROUP(1, 1)" device ref usb2_port1 on end end chip drivers/usb/acpi register "desc" = ""USB2 Type-C Port C1 (DB)"" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" register "group" = "ACPI_PLD_GROUP(2, 1)" device ref usb2_port4 on probe DB_USB USB3_ACTIVE end end chip drivers/usb/acpi register "desc" = ""USB2 Camera"" register "type" = "UPC_TYPE_INTERNAL" device ref usb2_port5 on end end chip drivers/usb/acpi register "desc" = ""USB2 Type-C Port C0 (MLB)"" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" register "group" = "ACPI_PLD_GROUP(3, 1)" device ref usb2_port9 on end end chip drivers/usb/acpi register "desc" = ""USB2 Bluetooth"" register "type" = "UPC_TYPE_INTERNAL" register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_A13)" device ref usb2_port10 on end end chip drivers/usb/acpi register "desc" = ""USB3 Type-A Port A0 (MLB)"" register "type" = "UPC_TYPE_USB3_A" register "group" = "ACPI_PLD_GROUP(1, 2)" device ref usb3_port1 on end end end end end end end