chip northbridge/intel/sandybridge # IGD Displays register "gfx" = "GMA_STATIC_DISPLAYS(0)" # Enable DisplayPort Hotplug with 6ms pulse register "gpu_dp_d_hotplug" = "0x06" # Enable Panel as LVDS and configure power delays register "gpu_panel_port_select" = "PANEL_PORT_LVDS" register "gpu_panel_power_cycle_delay" = "5" # T4: 400ms register "gpu_panel_power_up_delay" = "400" # T1+T2: 40ms register "gpu_panel_power_down_delay" = "150" # T3: 15ms register "gpu_panel_power_backlight_on_delay" = "2100" # T5: 210ms register "gpu_panel_power_backlight_off_delay" = "2100" # TD: 210ms # For native gfx register "gpu_cpu_backlight" = "0x1155" register "gpu_pch_backlight" = "0x06100610" register "max_mem_clock_mhz" = "666" chip cpu/intel/model_206ax device cpu_cluster 0 on end register "tcc_offset" = "5" # TCC of 95C end device domain 0 on subsystemid 0x1ae0 0xc000 inherit device ref host_bridge on end # host bridge device ref igd on end # vga controller chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH # GPI routing # 0 No effect (default) # 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set) # 2 SCI (if corresponding GPIO_EN bit is also set) register "alt_gp_smi_en" = "0x0002" register "gpi1_routing" = "1" register "gpi6_routing" = "2" register "sata_port_map" = "0x3" # Set max SATA speed to 3.0 Gb/s register "sata_interface_speed_support" = "0x2" # Enable EC Port 0x68/0x6C register "gen1_dec" = "0x00040069" # EC range is 0x800-0x9ff register "gen2_dec" = "0x00fc0901" # EC range is 0x1610-0x161F register "gen3_dec" = "0x0001C1611" # Enable zero-based linear PCIe root port functions register "pcie_port_coalesce" = "true" device ref xhci on end # USB 3.0 Controller device ref mei1 on end # Management Engine Interface 1 device ref mei2 off end # Management Engine Interface 2 device ref me_ide_r off end # Management Engine IDE-R device ref me_kt off end # Management Engine KT device ref gbe off end # Intel Gigabit Ethernet device ref ehci2 on end # USB2 EHCI #2 (AUO4, BlueTooth) device ref hda on end # High Definition Audio device ref pcie_rp1 on end # PCIe Port #1 device ref pcie_rp2 on end # PCIe Port #2 (WLAN) device ref pcie_rp3 on end # PCIe Port #3 (Card Reader) register "pcie_aspm[2]" = "0x3" device ref pcie_rp4 off end # PCIe Port #4 device ref pcie_rp5 off end # PCIe Port #5 device ref pcie_rp6 on end # PCIe Port #6 (LAN) device ref pcie_rp7 off end # PCIe Port #7 device ref pcie_rp8 off end # PCIe Port #8 device ref ehci1 on end # USB2 EHCI #1 (Camera, WLAN, WWAN) device ref pci_bridge off end # PCI bridge device ref lpc on chip drivers/pc80/tpm device pnp 0c31.0 on end end chip ec/quanta/it8518 # 60h/64h KBC device pnp ff.1 on # dummy address end end end # LPC bridge device ref sata1 on end # SATA Controller 1 (HDD/SSD) device ref smbus on end # SMBus Controller device ref sata2 off end # SATA Controller 2 (MSATA) device ref thermal off end # Thermal end end end