##
## This file is part of the coreboot project.
##
## Copyright 2015 Google Inc.
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc.
##

chip soc/nvidia/tegra210
	register  "spintable_addr" = "0x80000008"

	device cpu_cluster 0 on
		device cpu 0 on end
	end

	register "display_controller" = "TEGRA_ARM_DISPLAYA"
	register "xres" = "2560"
	register "yres" = "1800"

	# bits per pixel and color depth
	register "framebuffer_bits_per_pixel" = "32"
	register "color_depth" = "12"

	# framebuffer resolution
	register "display_xres" = "1280"
	register "display_yres" = "800"

	register "href_to_sync" = "1"
	register "hfront_porch" = "80"
	register "hsync_width" = "80"
	register "hback_porch" = "80"

	register "vref_to_sync" = "1"
	register "vfront_porch" = "4"
	register "vsync_width" = "4"
	register "vback_porch" = "4"
	register "refresh" = "60"

	# use value from kernel driver
	register "pixel_clock" = "304416000"
	register "win_opt" = "DSI_ENABLE"
end