# SPDX-License-Identifier: GPL-2.0-or-later chip soc/amd/sabrina # eSPI Configuration register "common_config.espi_config" = "{ .std_io_decode_bitmap = ESPI_DECODE_IO_0x80_EN | ESPI_DECODE_IO_0X60_0X64_EN, .generic_io_range[0] = { .base = 0x62, /* * Only 0x62 and 0x66 are required. But, this is not supported by * standard IO decodes and there are only 4 generic I/O windows * available. Hence, open a window from 0x62-0x67. */ .size = 5, }, .generic_io_range[1] = { .base = 0x800, /* EC_HOST_CMD_REGION0 */ .size = 256, /* EC_HOST_CMD_REGION_SIZE * 2 */ }, .generic_io_range[2] = { .base = 0x900, /* EC_LPC_ADDR_MEMMAP */ .size = 255, /* EC_MEMMAP_SIZE */ }, .generic_io_range[3] = { .base = 0x200, /* EC_LPC_ADDR_HOST_DATA */ .size = 8, /* 0x200 - 0x207 */ }, .io_mode = ESPI_IO_MODE_QUAD, .op_freq_mhz = ESPI_OP_FREQ_16_MHZ, .crc_check_enable = 1, .alert_pin = ESPI_ALERT_PIN_OPEN_DRAIN, .periph_ch_en = 1, .vw_ch_en = 1, .oob_ch_en = 0, .flash_ch_en = 0, .vw_irq_polarity = ESPI_VW_IRQ_LEVEL_HIGH(1), }" register "i2c_scl_reset" = "GPIO_I2C0_SCL | GPIO_I2C1_SCL | GPIO_I2C2_SCL | GPIO_I2C3_SCL" # I2C Pad Control RX Select Configuration register "i2c_pad[0].rx_level" = "I2C_PAD_RX_1_8V" # Touchpad register "i2c_pad[1].rx_level" = "I2C_PAD_RX_1_8V" # Touchscreen register "i2c_pad[2].rx_level" = "I2C_PAD_RX_1_8V" # Audio/SAR register "i2c_pad[3].rx_level" = "I2C_PAD_RX_1_8V" # GSC # general purpose PCIe clock output configuration register "gpp_clk_config[0]" = "GPP_CLK_REQ" register "gpp_clk_config[1]" = "GPP_CLK_REQ" register "gpp_clk_config[2]" = "GPP_CLK_REQ" register "gpp_clk_config[3]" = "GPP_CLK_OFF" register "pspp_policy" = "DXIO_PSPP_DISABLED" # TODO: reenable when PSPP works register "s0ix_enable" = "true" device domain 0 on device ref lpc_bridge on chip ec/google/chromeec device pnp 0c09.0 alias chrome_ec on end end end device ref gpp_bridge_0 on # WLAN chip drivers/wifi/generic register "wake" = "GEVENT_8" device pci 00.0 on end end end device ref gpp_bridge_1 on end # SD device ref gpp_bridge_2 on end # NVMe device ref gpp_bridge_a on # Internal GPP Bridge 0 to Bus A device ref gfx on end # Internal GPU (GFX) device ref gfx_hda on end # Display HD Audio Controller (GFXAZ) device ref crypto on end # Crypto Coprocessor device ref xhci_0 on # USB 3.1 (USB0) chip drivers/usb/acpi device ref xhci_0_root_hub on chip drivers/usb/acpi register "desc" = ""USB3 Type-C Port C0 (MLB)"" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" register "use_custom_pld" = "true" register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))" device ref usb3_port0 on end end chip drivers/usb/acpi register "desc" = ""USB2 Type-C Port C0 (MLB)"" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" register "use_custom_pld" = "true" register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))" device ref usb2_port0 on end end chip drivers/usb/acpi register "desc" = ""User-Facing Camera"" register "type" = "UPC_TYPE_INTERNAL" device ref usb2_port1 on end end end end end device ref xhci_1 on # USB 3.1 (USB1) chip drivers/usb/acpi device ref xhci_1_root_hub on chip drivers/usb/acpi register "desc" = ""USB3 Type-C Port C1 (DB)"" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" register "use_custom_pld" = "true" register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(2, 1))" device ref usb3_port2 on end end chip drivers/usb/acpi register "desc" = ""USB2 Type-C Port C1 (DB)"" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" register "use_custom_pld" = "true" register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(2, 1))" device ref usb2_port2 on end end chip drivers/usb/acpi register "desc" = ""World-Facing Camera"" register "type" = "UPC_TYPE_INTERNAL" device ref usb2_port4 on end end end end end device ref acp on end # Audio Processor (ACP) end device ref gpp_bridge_c on # Internal GPP Bridge 2 to Bus C device ref xhci_2 on # USB 2.0 (USB2) chip drivers/usb/acpi register "type" = "UPC_TYPE_HUB" device usb 0.0 alias xhci_2_root_hub on chip drivers/usb/acpi register "desc" = ""Bluetooth"" register "type" = "UPC_TYPE_INTERNAL" register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_10)" device usb 2.0 alias usb2_port5 on end end end end end end end # domain device ref uart_0 on end # UART0 device ref i2c_0 on end device ref i2c_1 on end device ref i2c_2 on end device ref i2c_3 on chip drivers/i2c/tpm register "hid" = ""GOOG0005"" register "desc" = ""Ti50 TPM"" register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_18)" device i2c 50 on end end end end # chip soc/amd/sabrina