chip northbridge/intel/sandybridge # IGD Displays register "gfx" = "GMA_STATIC_DISPLAYS(0)" # Enable DisplayPort Hotplug with 6ms pulse register "gpu_dp_d_hotplug" = "0x06" # Enable Panel as LVDS and configure power delays register "gpu_panel_port_select" = "PANEL_PORT_LVDS" register "gpu_panel_power_cycle_delay" = "6" # T7: 500ms register "gpu_panel_power_up_delay" = "100" # T1+T2: 10ms register "gpu_panel_power_down_delay" = "100" # T5+T6: 10ms register "gpu_panel_power_backlight_on_delay" = "2100" # T3: 210ms register "gpu_panel_power_backlight_off_delay" = "2100" # T4: 210ms # Set backlight PWM values register "gpu_cpu_backlight" = "0x000001e8" register "gpu_pch_backlight" = "0x03d00000" register "ec_present" = "1" # FIXME: Native raminit requires reduced max clock register "max_mem_clock_mhz" = "CONFIG(USE_NATIVE_RAMINIT) ? 666 : 800" # Force double refresh rate register "ddr_refresh_rate_config" = "DDR_REFRESH_RATE_DOUBLE" register "usb_port_config" = "{ { 1, 0, 0x0040 }, { 1, 0, 0x0040 }, { 1, 0, 0x0040 }, { 0, 0, 0x0000 }, { 0, 0, 0x0000 }, { 0, 0, 0x0000 }, { 0, 0, 0x0000 }, { 0, 0, 0x0000 }, { 0, 4, 0x0000 }, { 1, 4, 0x0080 }, { 1, 4, 0x0040 }, { 0, 4, 0x0000 }, { 0, 4, 0x0000 }, { 0, 4, 0x0000 },}" device domain 0 on device ref host_bridge on end # host bridge device ref peg10 off end # PCIe Bridge for discrete graphics device ref igd on end # vga controller chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH # GPI routing # 0 No effect (default) # 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set) # 2 SCI (if corresponding GPIO_EN bit is also set) register "alt_gp_smi_en" = "0x0000" #register "gpi1_routing" = "1" #SMI from EC register "gpi13_routing" = "2" #SCI from EC # Enable SATA ports 0 & 1 register "sata_port_map" = "0x3" # Set max SATA speed to 3.0 Gb/s register "sata_interface_speed_support" = "0x2" # Enable EC Port 0x68/0x6C register "gen1_dec" = "0x00040069" # EC range is 0x380-0387 register "gen2_dec" = "0x00040381" # Enable zero-based linear PCIe root port functions register "pcie_port_coalesce" = "true" device ref xhci on end # USB 3.0 Controller device ref mei1 on end # Management Engine Interface 1 device ref mei2 off end # Management Engine Interface 2 device ref me_ide_r off end # Management Engine IDE-R device ref me_kt off end # Management Engine KT device ref gbe off end # Intel Gigabit Ethernet device ref ehci2 on end # USB2 EHCI #2 device ref hda on end # High Definition Audio device ref pcie_rp1 on end # PCIe Port #1 (mini PCIe Slot - WLAN & Serial debug) device ref pcie_rp2 on end # PCIe Port #2 (ETH0) device ref pcie_rp3 on end # PCIe Port #3 (Card Reader) #force ASPM for PCIe bridge to Card Reader register "pcie_aspm[2]" = "0x3" device ref pcie_rp4 off end # PCIe Port #4 device ref pcie_rp5 off end # PCIe Port #5 device ref pcie_rp6 off end # PCIe Port #6 device ref pcie_rp7 off end # PCIe Port #7 device ref pcie_rp8 off end # PCIe Port #8 device ref ehci1 on end # USB2 EHCI #1 device ref pci_bridge off end # PCI bridge device ref lpc on #LPC bridge chip drivers/pc80/tpm device pnp 0c31.0 on end end chip ec/quanta/ene_kb3940q # 60/64 KBC device pnp ff.1 on # dummy address end end end # LPC bridge device ref sata1 on end # SATA Controller 1 device ref smbus on subsystemid 0x04B4 0x18D1 end # SMBus device ref sata2 off end # SATA Controller 2 device ref thermal on end # Thermal end end end