/* SPDX-License-Identifier: GPL-2.0-or-later */ #include #include #include #include /* Pad configuration in ramstage */ static const struct pad_config override_gpio_table[] = { /* A20 : DDSP_HPD2 ==> NC */ PAD_NC(GPP_A20, NONE), /* E20 : DDP2_CTRLCLK ==> NC */ PAD_NC(GPP_E20, NONE), /* E21 : DDP2_CTRLDATA ==> NC */ PAD_NC(GPP_E21, NONE), /* F0 : CNV_BRI_DT ==> NC*/ PAD_NC(GPP_F0, NONE), /* F1 : CNV_BRI_RSP ==> NC */ PAD_NC(GPP_F1, NONE), /* F2 : CNV_RGI_DT ==> NC */ PAD_NC(GPP_F2, NONE), /* F3 : CNV_RGI_RSP ==> NC */ PAD_NC(GPP_F3, NONE), /* F4 : CNV_RF_RESET# ==> NC */ PAD_NC(GPP_F4, NONE), /* F5 : CRF_XTAL_CLKREQ ==> NC */ PAD_NC(GPP_F5, NONE), /* R6 : DMIC_CLK_A_1A ==> NC */ PAD_NC(GPP_R6, NONE), /* R7 : DMIC_DATA_1A ==> NC */ PAD_NC(GPP_R7, NONE), }; /* Early pad configuration in bootblock */ static const struct pad_config early_gpio_table[] = { /* H12 : UART0_RTS# ==> SD_PERST_L */ PAD_CFG_GPO(GPP_H12, 0, DEEP), /* H20 : IMGCLKOUT1 ==> WLAN_PERST_L */ PAD_CFG_GPO(GPP_H20, 0, DEEP), /* A13 : GPP_A13 ==> GSC_SOC_INT_ODL */ PAD_CFG_GPI_APIC(GPP_A13, NONE, PLTRST, LEVEL, INVERT), /* E12 : THC0_SPI1_IO1 ==> SOC_WP_OD */ PAD_CFG_GPI_GPIO_DRIVER(GPP_E12, NONE, DEEP), /* F18 : THC1_SPI2_INT# ==> EC_IN_RW_OD */ PAD_CFG_GPI(GPP_F18, NONE, DEEP), /* H4 : I2C0_SDA ==> SOC_I2C_GSC_SDA */ PAD_CFG_NF(GPP_H4, NONE, DEEP, NF1), /* H5 : I2C0_SCL ==> SOC_I2C_GSC_SCL */ PAD_CFG_NF(GPP_H5, NONE, DEEP, NF1), /* H10 : UART0_RXD ==> UART_SOC_RX_DBG_TX */ PAD_CFG_NF(GPP_H10, NONE, DEEP, NF2), /* H11 : UART0_TXD ==> UART_SOC_TX_DBG_RX */ PAD_CFG_NF(GPP_H11, NONE, DEEP, NF2), /* H13 : UART0_CTS# ==> EN_PP3300_SD_X */ PAD_CFG_GPO(GPP_H13, 1, DEEP), }; static const struct pad_config romstage_gpio_table[] = { /* Enable touchscreen, hold in reset */ /* C0 : SMBCLK ==> EN_PP3300_TCHSCR */ PAD_CFG_GPO(GPP_C0, 1, DEEP), /* C1 : SMBDATA ==> USI_RST_L */ PAD_CFG_GPO(GPP_C1, 0, DEEP), /* H12 : UART0_RTS# ==> SD_PERST_L */ PAD_CFG_GPO(GPP_H12, 1, DEEP), /* H20 : IMGCLKOUT1 ==> WLAN_PERST_L */ PAD_CFG_GPO(GPP_H20, 1, DEEP), }; const struct pad_config *variant_gpio_override_table(size_t *num) { *num = ARRAY_SIZE(override_gpio_table); return override_gpio_table; } const struct pad_config *variant_early_gpio_table(size_t *num) { *num = ARRAY_SIZE(early_gpio_table); return early_gpio_table; } const struct pad_config *variant_romstage_gpio_table(size_t *num) { *num = ARRAY_SIZE(romstage_gpio_table); return romstage_gpio_table; }