chip soc/intel/alderlake # Intel Common SoC Config #+-------------------+---------------------------+ #| Field | Value | #+-------------------+---------------------------+ #| I2C0 | Audio | #| I2C1 | cr50 TPM. Early init is | #| | required to set up a BAR | #| | for TPM communication | #+-------------------+---------------------------+ register "common_soc_config" = "{ .i2c[0] = { .speed = I2C_SPEED_FAST, }, .i2c[1] = { .early_init = 1, .speed = I2C_SPEED_FAST, }, }" register "usb2_ports[1]" = "USB2_PORT_EMPTY" # Disable Port 1 register "usb2_ports[2]" = "USB2_PORT_EMPTY" # Disable Port 2 register "usb2_ports[3]" = "USB2_PORT_EMPTY" # Disable Port 3 register "usb2_ports[4]" = "USB2_PORT_EMPTY" # Disable Port 4 register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)" # USB HUB register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Rear USB Type A register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB HUB register "tcss_ports[1]" = "TCSS_PORT_DEFAULT(OC1)" # BTB register "tcss_ports[2]" = "TCSS_PORT_EMPTY" # Disable Port2 # I2C Port Config register "SerialIoI2cMode" = "{ [PchSerialIoIndexI2C0] = PchSerialIoPci, [PchSerialIoIndexI2C1] = PchSerialIoPci, [PchSerialIoIndexI2C2] = PchSerialIoDisabled, [PchSerialIoIndexI2C3] = PchSerialIoDisabled, [PchSerialIoIndexI2C4] = PchSerialIoDisabled, [PchSerialIoIndexI2C5] = PchSerialIoDisabled, }" register "SerialIoGSpiMode" = "{ [PchSerialIoIndexGSPI0] = PchSerialIoDisabled, [PchSerialIoIndexGSPI1] = PchSerialIoDisabled, }" device domain 0 on device ref pcie_rp7 on chip drivers/net register "customized_leds" = "0x05af" register "wake" = "GPE0_DW0_07" #GPP_A7 register "stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_H22)" register "stop_delay_ms" = "12" # NIC needs time to quiesce register "stop_off_delay_ms" = "1" register "has_power_resource" = "1" register "device_index" = "0" device pci 00.0 on end end end # RTL8111K Ethernet NIC device ref pcie_rp8 off end device ref pcie_rp9 off end device ref pcie4_0 on # Enable CPU PCIE RP 1 using CLK 0 register "cpu_pcie_rp[CPU_RP(1)]" = "{ .clk_req = 0, .clk_src = 0, .flags = PCIE_RP_LTR | PCIE_RP_AER, }" end device ref tbt_pcie_rp2 off end # Disable TCP Port 2 device ref cnvi_wifi on chip drivers/wifi/generic register "wake" = "GPE0_PME_B0" device generic 0 on end end end device ref tcss_dma0 off end device ref tcss_dma1 off end device ref i2c0 on chip drivers/i2c/generic register "hid" = ""RTL5682"" register "name" = ""RT58"" register "desc" = ""Headset Codec"" register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_A23)" # Set the jd_src to RT5668_JD1 for jack detection register "property_count" = "1" register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER" register "property_list[0].name" = ""realtek,jd-src"" register "property_list[0].integer" = "1" device i2c 1a on end end end #I2C0 device ref gspi1 off end device ref pch_espi on chip ec/google/chromeec use conn0 as mux_conn[0] device pnp 0c09.0 on end end end device ref pmc hidden chip drivers/intel/pmc_mux device generic 0 on chip drivers/intel/pmc_mux/conn use usb2_port1 as usb2_port use tcss_usb3_port1 as usb3_port device generic 0 alias conn0 on end end end end end device ref tcss_xhci on chip drivers/usb/acpi device ref tcss_root_hub on chip drivers/usb/acpi register "desc" = ""USB3 Type-C Port C0 (MLB)"" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" register "use_custom_pld" = "true" register "custom_pld" = "ACPI_PLD_TYPE_C(BACK, RIGHT, ACPI_PLD_GROUP(1, 1))" device ref tcss_usb3_port1 on end end end end end device ref xhci on chip drivers/usb/acpi device ref xhci_root_hub on chip drivers/usb/acpi register "desc" = ""USB2 Type-C Port C0 (MLB)"" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" register "use_custom_pld" = "true" register "custom_pld" = "ACPI_PLD_TYPE_C(BACK, RIGHT, ACPI_PLD_GROUP(1, 1))" device ref usb2_port1 on end end chip drivers/usb/acpi register "desc" = ""USB2 Hub"" register "type" = "UPC_TYPE_A" register "use_custom_pld" = "true" register "custom_pld" = "ACPI_PLD_TYPE_A(UNKNOWN, CENTER, ACPI_PLD_GROUP(5, 1))" device ref usb2_port6 on end end chip drivers/usb/acpi register "desc" = ""USB2 Type-A Port A2 (MLB)"" register "type" = "UPC_TYPE_A" register "use_custom_pld" = "true" register "custom_pld" = "ACPI_PLD_TYPE_A(UNKNOWN, CENTER, ACPI_PLD_GROUP(6, 1))" device ref usb2_port7 on end end chip drivers/usb/acpi register "desc" = ""USB2 Type-A Port A1 (MLB)"" register "type" = "UPC_TYPE_A" register "use_custom_pld" = "true" register "custom_pld" = "ACPI_PLD_TYPE_A(UNKNOWN, CENTER, ACPI_PLD_GROUP(4, 1))" device ref usb2_port8 on end end chip drivers/usb/acpi register "desc" = ""USB2 Type-A Port A0 (MLB)"" register "type" = "UPC_TYPE_A" register "use_custom_pld" = "true" register "custom_pld" = "ACPI_PLD_TYPE_A(UNKNOWN, CENTER, ACPI_PLD_GROUP(1, 2))" device ref usb2_port9 on end end chip drivers/usb/acpi register "desc" = ""USB2 Bluetooth"" register "type" = "UPC_TYPE_INTERNAL" register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D4)" device ref usb2_port10 on end end chip drivers/usb/acpi register "desc" = ""USB3 Type-A Port A0 (MLB)"" register "type" = "UPC_TYPE_USB3_A" register "use_custom_pld" = "true" register "custom_pld" = "ACPI_PLD_TYPE_A(UNKNOWN, CENTER, ACPI_PLD_GROUP(1, 2))" device ref usb3_port1 on end end chip drivers/usb/acpi register "desc" = ""USB3 Type-A Port A1 (MLB)"" register "type" = "UPC_TYPE_USB3_A" register "use_custom_pld" = "true" register "custom_pld" = "ACPI_PLD_TYPE_A(UNKNOWN, CENTER, ACPI_PLD_GROUP(4, 1))" device ref usb3_port2 on end end chip drivers/usb/acpi register "desc" = ""USB3 Type-A Port A2 (MLB)"" register "type" = "UPC_TYPE_USB3_A" register "use_custom_pld" = "true" register "custom_pld" = "ACPI_PLD_TYPE_A(UNKNOWN, CENTER, ACPI_PLD_GROUP(6, 1))" device ref usb3_port3 on end end chip drivers/usb/acpi register "desc" = ""USB Hub"" register "type" = "UPC_TYPE_USB3_A" register "use_custom_pld" = "true" register "custom_pld" = "ACPI_PLD_TYPE_A(UNKNOWN, CENTER, ACPI_PLD_GROUP(5, 1))" device ref usb3_port4 on end end end end end end end