fw_config field THERMAL_SOLUTION 0 0 option THERMAL_SOLUTION_6W 0 option THERMAL_SOLUTION_15W 1 end end chip soc/intel/alderlake register "sagv" = "SaGv_Enabled" # EMMC Tx CMD Delay # Refer to EDS-Vol2-42.3.7. # [14:8] steps of delay for DDR mode, each 125ps, range: 0 - 39. # [6:0] steps of delay for SDR mode, each 125ps, range: 0 - 39. register "common_soc_config.emmc_dll.emmc_tx_cmd_cntl" = "0x505" # EMMC TX DATA Delay 1 # Refer to EDS-Vol2-42.3.8. # [14:8] steps of delay for HS400, each 125ps, range: 0 - 78. # [6:0] steps of delay for SDR104/HS200, each 125ps, range: 0 - 79. register "common_soc_config.emmc_dll.emmc_tx_data_cntl1" = "0x909" # EMMC TX DATA Delay 2 # Refer to EDS-Vol2-42.3.9. # [30:24] steps of delay for SDR50, each 125ps, range: 0 - 79. # [22:16] steps of delay for DDR50, each 125ps, range: 0 - 78. # [14:8] steps of delay for SDR25/HS50, each 125ps, range: 0 -79. # [6:0] steps of delay for SDR12, each 125ps. Range: 0 - 79. register "common_soc_config.emmc_dll.emmc_tx_data_cntl2" = "0x1C2A2828" # EMMC RX CMD/DATA Delay 1 # Refer to EDS-Vol2-42.3.10. # [30:24] steps of delay for SDR50, each 125ps, range: 0 - 119. # [22:16] steps of delay for DDR50, each 125ps, range: 0 - 78. # [14:8] steps of delay for SDR25/HS50, each 125ps, range: 0 - 119. # [6:0] steps of delay for SDR12, each 125ps, range: 0 - 119. register "common_soc_config.emmc_dll.emmc_rx_cmd_data_cntl1" = "0x1C1B4F1B" # EMMC RX CMD/DATA Delay 2 # Refer to EDS-Vol2-42.3.12. # [17:16] stands for Rx Clock before Output Buffer, # 00: Rx clock after output buffer, # 01: Rx clock before output buffer, # 10: Automatic selection based on working mode. # 11: Reserved # [14:8] steps of delay for Auto Tuning Mode, each 125ps, range: 0 - 39. # [6:0] steps of delay for HS200, each 125ps, range: 0 - 79. register "common_soc_config.emmc_dll.emmc_rx_cmd_data_cntl2" = "0x1004E" # EMMC Rx Strobe Delay # Refer to EDS-Vol2-42.3.11. # [14:8] Rx Strobe Delay DLL 1(HS400 Mode), each 125ps, range: 0 - 39. # [6:0] Rx Strobe Delay DLL 2(HS400 Mode), each 125ps, range: 0 - 39. register "common_soc_config.emmc_dll.emmc_rx_strobe_cntl" = "0x01515" # Bit 0 - C0 has no redriver, so enable SBU muxing in the SoC. # Bit 2 - C1 has a redriver which does SBU muxing. # Bit 1,3 - AUX lines are not swapped on the motherboard for either C0 or C1. register "tcss_aux_ori" = "1" register "typec_aux_bias_pads[0]" = "{.pad_auxp_dc = GPP_E22, .pad_auxn_dc = GPP_E23}" register "serial_io_i2c_mode" = "{ [PchSerialIoIndexI2C0] = PchSerialIoPci, [PchSerialIoIndexI2C1] = PchSerialIoPci, [PchSerialIoIndexI2C2] = PchSerialIoDisabled, [PchSerialIoIndexI2C3] = PchSerialIoPci, [PchSerialIoIndexI2C4] = PchSerialIoDisabled, [PchSerialIoIndexI2C5] = PchSerialIoPci, }" # Intel Common SoC Config #+-------------------+---------------------------+ #| Field | Value | #+-------------------+---------------------------+ #| I2C0 | TPM. Early init is | #| | required to set up a BAR | #| | for TPM communication | #| I2C1 | Touchscreen | #| I2C3 | Audio | #| I2C5 | Trackpad | #+-------------------+---------------------------+ register "common_soc_config" = "{ .i2c[0] = { .early_init = 1, .speed = I2C_SPEED_FAST_PLUS, .speed_config[0] = { .speed = I2C_SPEED_FAST_PLUS, .scl_lcnt = 55, .scl_hcnt = 30, .sda_hold = 7, } }, .i2c[1] = { .speed = I2C_SPEED_FAST, .speed_config[0] = { .speed = I2C_SPEED_FAST, .scl_lcnt = 158, .scl_hcnt = 79, .sda_hold = 7, } }, .i2c[3] = { .speed = I2C_SPEED_FAST, .speed_config[0] = { .speed = I2C_SPEED_FAST, .scl_lcnt = 158, .scl_hcnt = 79, .sda_hold = 7, } }, .i2c[5] = { .speed = I2C_SPEED_FAST, .speed_config[0] = { .speed = I2C_SPEED_FAST, .scl_lcnt = 158, .scl_hcnt = 79, .sda_hold = 7, } }, }" register "usb2_ports[1]" = "USB2_PORT_EMPTY" # Disable USB2 Port 2 register "usb2_ports[4]" = "USB2_PORT_EMPTY" # Disable USB2 Port 5 register "usb2_ports[6]" = "USB2_PORT_EMPTY" # Disable USB2 Port 7 register "usb2_ports[7]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth port for CNVi WLAN register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth port for CNVi WLAN register "power_limits_config[ADL_N_041_6W_CORE]" = "{ .tdp_pl1_override = 20, .tdp_pl2_override = 25, .tdp_pl4 = 78, }" register "power_limits_config[ADL_N_081_15W_CORE]" = "{ .tdp_pl1_override = 20, .tdp_pl2_override = 35, .tdp_pl4 = 83, }" device domain 0 on device ref dtt on chip drivers/intel/dptf ## sensor information register "options.tsr[0].desc" = ""DDR"" register "options.tsr[1].desc" = ""charger"" register "options.tsr[2].desc" = ""ambient"" ## Active Policy register "policies.active" = "{ [0] = { .target = DPTF_CPU, .thresholds = { TEMP_PCT(95, 100), TEMP_PCT(83, 64), TEMP_PCT(72, 59), TEMP_PCT(65, 54), TEMP_PCT(52, 49), TEMP_PCT(42, 43), TEMP_PCT(38, 29), } }, [1] = { .target = DPTF_TEMP_SENSOR_0, .thresholds = { TEMP_PCT(60, 100), TEMP_PCT(55, 64), TEMP_PCT(52, 59), TEMP_PCT(50, 54), TEMP_PCT(48, 49), TEMP_PCT(45, 43), TEMP_PCT(41, 29), } } }" ## Passive Policy register "policies.passive" = "{ [0] = DPTF_PASSIVE(CPU, CPU, 85, 5000), [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 65, 5000), [2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 65, 5000), [3] = DPTF_PASSIVE(CPU, TEMP_SENSOR_2, 65, 5000), }" ## Critical Policy register "policies.critical" = "{ [0] = DPTF_CRITICAL(CPU, 110, SHUTDOWN), [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 75, SHUTDOWN), [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 75, SHUTDOWN), [3] = DPTF_CRITICAL(TEMP_SENSOR_2, 75, SHUTDOWN), }" register "controls.power_limits" = "{ .pl1 = { .min_power = 6000, .max_power = 6000, .time_window_min = 28 * MSECS_PER_SEC, .time_window_max = 28 * MSECS_PER_SEC, .granularity = 500 }, .pl2 = { .min_power = 6000, .max_power = 6000, .time_window_min = 32 * MSECS_PER_SEC, .time_window_max = 32 * MSECS_PER_SEC, .granularity = 500 } }" ## Charger Performance Control (Control, mA) register "controls.charger_perf" = "{ [0] = { 255, 1700 }, [1] = { 24, 1500 }, [2] = { 16, 1000 }, [3] = { 8, 500 } }" ## Fan Performance Control (Percent, Speed, Noise, Power) register "controls.fan_perf" = "{ [0] = { 100, 6000, 220, 2200, }, [1] = { 92, 5500, 180, 1800, }, [2] = { 85, 5000, 145, 1450, }, [3] = { 70, 4400, 115, 1150, }, [4] = { 56, 3900, 90, 900, }, [5] = { 45, 3300, 55, 550, }, [6] = { 38, 3000, 30, 300, }, [7] = { 33, 2900, 15, 150, }, [8] = { 10, 800, 10, 100, }, [9] = { 0, 0, 0, 50, } }" ## Fan options register "options.fan.fine_grained_control" = "1" register "options.fan.step_size" = "2" device generic 0 on probe THERMAL_SOLUTION THERMAL_SOLUTION_6W end end chip drivers/intel/dptf ## sensor information register "options.tsr[0].desc" = ""DDR"" register "options.tsr[1].desc" = ""charger"" register "options.tsr[2].desc" = ""ambient"" ## Active Policy register "policies.active" = "{ [0] = { .target = DPTF_CPU, .thresholds = { TEMP_PCT(70, 100), TEMP_PCT(60, 65), TEMP_PCT(42, 58), TEMP_PCT(39, 53), TEMP_PCT(38, 47), TEMP_PCT(35, 43), TEMP_PCT(31, 30), } }, [1] = { .target = DPTF_TEMP_SENSOR_0, .thresholds = { TEMP_PCT(60, 100), TEMP_PCT(55, 65), TEMP_PCT(52, 58), TEMP_PCT(50, 53), TEMP_PCT(48, 47), TEMP_PCT(45, 43), TEMP_PCT(41, 30), } } }" ## Passive Policy register "policies.passive" = "{ [0] = DPTF_PASSIVE(CPU, CPU, 90, 5000), [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 70, 5000), [2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 70, 5000), [3] = DPTF_PASSIVE(CPU, TEMP_SENSOR_2, 70, 5000), }" ## Critical Policy register "policies.critical" = "{ [0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN), [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 80, SHUTDOWN), [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 80, SHUTDOWN), [3] = DPTF_CRITICAL(TEMP_SENSOR_2, 80, SHUTDOWN), }" register "controls.power_limits" = "{ .pl1 = { .min_power = 15000, .max_power = 15000, .time_window_min = 28 * MSECS_PER_SEC, .time_window_max = 28 * MSECS_PER_SEC, .granularity = 500 }, .pl2 = { .min_power = 15000, .max_power = 15000, .time_window_min = 32 * MSECS_PER_SEC, .time_window_max = 32 * MSECS_PER_SEC, .granularity = 500 } }" ## Charger Performance Control (Control, mA) register "controls.charger_perf" = "{ [0] = { 255, 1700 }, [1] = { 24, 1500 }, [2] = { 16, 1000 }, [3] = { 8, 500 } }" ## Fan Performance Control (Percent, Speed, Noise, Power) register "controls.fan_perf" = "{ [0] = { 100, 6000, 220, 2200, }, [1] = { 92, 5500, 180, 1800, }, [2] = { 85, 5000, 145, 1450, }, [3] = { 70, 4400, 115, 1150, }, [4] = { 56, 3900, 90, 900, }, [5] = { 45, 3300, 55, 550, }, [6] = { 38, 3000, 30, 300, }, [7] = { 33, 2900, 15, 150, }, [8] = { 10, 800, 10, 100, }, [9] = { 0, 0, 0, 50, } }" ## Fan options register "options.fan.fine_grained_control" = "1" register "options.fan.step_size" = "2" device generic 1 on probe THERMAL_SOLUTION THERMAL_SOLUTION_15W end end end device ref i2c1 on chip drivers/i2c/hid register "generic.hid" = ""ELAN9004"" register "generic.desc" = ""ELAN Touchscreen"" register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)" register "generic.detect" = "1" register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)" register "generic.reset_delay_ms" = "20" register "generic.reset_off_delay_ms" = "2" register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)" register "generic.enable_delay_ms" = "6" register "generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)" register "generic.stop_delay_ms" = "150" register "generic.stop_off_delay_ms" = "2" register "generic.has_power_resource" = "1" register "hid_desc_reg_offset" = "0x01" device i2c 10 on end end end #I2C1 device ref i2c3 on chip drivers/i2c/generic register "hid" = ""10EC5650"" register "name" = ""RT58"" register "desc" = ""Realtek RT5650"" register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_A23)" register "property_count" = "1" register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER" register "property_list[0].name" = ""realtek,jd-mode"" register "property_list[0].integer" = "2" device i2c 1a on end end end #I2C3 device ref i2c5 on chip drivers/i2c/generic register "hid" = ""ELAN0000"" register "desc" = ""ELAN Touchpad"" register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F14_IRQ)" register "wake" = "GPE0_DW2_14" register "detect" = "1" device i2c 15 on end end chip drivers/i2c/hid register "generic.hid" = ""SYNA0000"" register "generic.cid" = ""ACPI0C50"" register "generic.desc" = ""Synaptics Touchpad"" register "generic.irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F14_IRQ)" register "generic.wake" = "GPE0_DW2_14" register "generic.detect" = "1" register "hid_desc_reg_offset" = "0x20" device i2c 2c on end end chip drivers/i2c/hid register "generic.hid" = ""PIXA2303"" register "generic.desc" = ""PIXA Touchpad"" register "generic.irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F14_IRQ)" register "generic.wake" = "GPE0_DW2_14" register "generic.detect" = "1" register "hid_desc_reg_offset" = "0x20" device i2c 0x68 on end end end device ref pcie_rp7 off end device ref emmc on end device ref ish on chip drivers/intel/ish register "add_acpi_dma_property" = "true" device generic 0 on end end end device ref ufs on end device ref cnvi_wifi on chip drivers/wifi/generic register "wake" = "GPE0_PME_B0" register "enable_cnvi_ddr_rfim" = "true" register "add_acpi_dma_property" = "true" device generic 0 on end end end device ref pch_espi on chip ec/google/chromeec use conn0 as mux_conn[0] device pnp 0c09.0 on end end end device ref pmc hidden chip drivers/intel/pmc_mux device generic 0 on chip drivers/intel/pmc_mux/conn use usb2_port1 as usb2_port use tcss_usb3_port1 as usb3_port device generic 0 alias conn0 on end end end end end device ref tcss_xhci on chip drivers/usb/acpi device ref tcss_root_hub on chip drivers/usb/acpi register "desc" = ""USB3 Type-C Port C0 (MLB)"" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" register "use_custom_pld" = "true" register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))" device ref tcss_usb3_port1 on end end end end end device ref xhci on chip drivers/usb/acpi device ref xhci_root_hub on chip drivers/usb/acpi register "desc" = ""USB2 Type-C Port C0 (MLB)"" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" register "use_custom_pld" = "true" register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))" device ref usb2_port1 on end end chip drivers/usb/acpi register "desc" = ""USB2 Type-A Port A0 (DB)"" register "type" = "UPC_TYPE_A" register "use_custom_pld" = "true" register "custom_pld" = "ACPI_PLD_TYPE_A(LEFT, RIGHT, ACPI_PLD_GROUP(3, 1))" device ref usb2_port3 on end end chip drivers/usb/acpi register "desc" = ""USB2 Type-A Port A1 (DB)"" register "type" = "UPC_TYPE_A" register "use_custom_pld" = "true" register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, LEFT, ACPI_PLD_GROUP(4, 1))" device ref usb2_port4 on end end chip drivers/usb/acpi register "desc" = ""USB2 Camera"" register "type" = "UPC_TYPE_INTERNAL" device ref usb2_port6 on end end chip drivers/usb/acpi register "desc" = ""USB2 Bluetooth"" register "type" = "UPC_TYPE_INTERNAL" register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D4)" device ref usb2_port8 on end end chip drivers/usb/acpi register "desc" = ""USB2 Bluetooth"" register "type" = "UPC_TYPE_INTERNAL" register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D4)" device ref usb2_port10 on end end chip drivers/usb/acpi register "desc" = ""USB3 Type-A Port A0 (MLB)"" register "type" = "UPC_TYPE_USB3_A" register "use_custom_pld" = "true" register "custom_pld" = "ACPI_PLD_TYPE_A(LEFT, RIGHT, ACPI_PLD_GROUP(3, 1))" device ref usb3_port1 on end end chip drivers/usb/acpi register "desc" = ""USB3 Type-A Port A1 (DB)"" register "type" = "UPC_TYPE_USB3_A" register "use_custom_pld" = "true" register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, LEFT, ACPI_PLD_GROUP(4, 1))" device ref usb3_port2 on end end end end end device ref hda on chip drivers/sof register "spkr_tplg" = "rt5650_sp" register "jack_tplg" = "rt5650_hp" register "mic_tplg" = "_2ch_pdm0" device generic 0 on end end end end end