## SPDX-License-Identifier: GPL-2.0-only

# To execute, do:
# qemu-system-riscv64 -M virt -m 1024M -nographic -bios build/coreboot.rom \
#                     -drive if=pflash,file=build/coreboot.rom,format=raw

if BOARD_EMULATION_QEMU_RISCV_RV64

config BOARD_EMULATION_QEMU_RISCV
	def_bool y
	select ARCH_RISCV_RV64
endif

if BOARD_EMULATION_QEMU_RISCV_RV32

config BOARD_EMULATION_QEMU_RISCV
	def_bool y
	select ARCH_RISCV_RV32
endif

if BOARD_EMULATION_QEMU_RISCV

config BOARD_SPECIFIC_OPTIONS
	def_bool y
	select BOARD_ROMSIZE_KB_32768
	select MISSING_BOARD_RESET
	select DRIVERS_UART_8250MEM
	select RISCV_HAS_OPENSBI
	select ARCH_RISCV_S
	select ARCH_RISCV_U
	select ARCH_RISCV_PMP
	select ARCH_BOOTBLOCK_RISCV
	select ARCH_VERSTAGE_RISCV
	select ARCH_ROMSTAGE_RISCV
	select ARCH_RAMSTAGE_RISCV
	select RISCV_USE_ARCH_TIMER

config MEMLAYOUT_LD_FILE
	string
	default "src/mainboard/emulation/qemu-riscv/memlayout.ld"

config MAINBOARD_DIR
	default "emulation/qemu-riscv"

config MAINBOARD_PART_NUMBER
	default "QEMU RISCV"

config MAX_CPUS
	int
	default 1

config RISCV_ARCH
	string
	default "rv64imafd" if ARCH_RISCV_RV64
	default "rv32im" if ARCH_RISCV_RV32

config RISCV_ABI
	string
	default "lp64d" if ARCH_RISCV_RV64
	default "ilp32" if ARCH_RISCV_RV32

config RISCV_CODEMODEL
	string
	default "medany" if ARCH_RISCV_RV64
	default "medany" if ARCH_RISCV_RV32

config RISCV_WORKING_HARTID
	int
	default 0

config DRAM_SIZE_MB
	int
	default 16383
	help
	  Qemu maps MMIO at ALIGN_UP(top_of_mem, 16 * GiB)
	  To avoid confusing the dram probing algorithm, avoid large dram sizes (16G - 1m)

config OPENSBI_PLATFORM
	string
	default "generic"

config OPENSBI_TEXT_START
	hex
	default 0x80020000

endif #  BOARD_EMULATION_QEMU_RISCV