##
## This file is part of the coreboot project.
##
## Copyright (C) 2014 Google Inc.
##
## This software is licensed under the terms of the GNU General Public
## License version 2, as published by the Free Software Foundation, and
## may be copied, distributed, and modified under those terms.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
## GNU General Public License for more details.

# To execute, do:
# util/riscv/make-spike-elf.sh build/coreboot.rom build/coreboot.elf
# qemu-system-riscv64 -M virt -m 1024M -nographic -kernel build/coreboot.elf

if BOARD_EMULATION_QEMU_RISCV

config BOARD_SPECIFIC_OPTIONS
	def_bool y
	select SOC_UCB_RISCV
	select BOARD_ROMSIZE_KB_4096
	select HAVE_UART_SPECIAL
	select BOOT_DEVICE_NOT_SPI_FLASH
	select MISSING_BOARD_RESET

config MAINBOARD_DIR
	string
	default emulation/qemu-riscv

config MAINBOARD_PART_NUMBER
	string
	default "QEMU RISCV"

config MAX_CPUS
	int
	default 1

config DRAM_SIZE_MB
	int
	default 32768

endif #  BOARD_EMULATION_QEMU_RISCV