chip cpu/ppc/ppc4xx 
	device pci_domain 0 on
		device pci 0.0 on end
		chip southbridge/winbond/w83c553 
			device pci 9.0 on end # ISA bridge
			device pci 9.1 on end # IDE contoller
		end
		device pci e.0 on end
	end
end
	
##
## Build the objects we have code for in this directory.
##

addaction coreboot.a "$(CONFIG_CROSS_COMPILE)ranlib coreboot.a"
makedefine CFLAGS += -msoft-float