##
## This file is part of the coreboot project.
##
## Copyright 2018 Facebook, Inc.
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
## GNU General Public License for more details.
##

if BOARD_CAVIUM_CN8100_SFF_EVB

config BOARD_SPECIFIC_OPTIONS
	def_bool y
	select BOARD_ROMSIZE_KB_16384
	select COMMON_CBFS_SPI_WRAPPER
	select RTC
	select SOC_CAVIUM_CN81XX
	select SPI_FLASH
	select SPI_FLASH_STMICRO

config MAINBOARD_DIR
	string
	default "cavium/cn8100_sff_evb"

config MAINBOARD_VENDOR
	string
	default "Cavium"

config DRAM_SIZE_MB
	int
	default 8192

config BOOT_DEVICE_SPI_FLASH_BUS
	int
	default 0

config CONSOLE_SERIAL_UART_ADDRESS
	hex
	depends on DRIVERS_UART
	default 0x87E028000000

config UART_FOR_CONSOLE
	int
	depends on DRIVERS_UART
	default 0

config FMDFILE
	string
	default "src/mainboard/$(CONFIG_MAINBOARD_DIR)/board.fmd"

config MAX_CPUS
	default 4

##########################################################
#### Update below when adding a new derivative board. ####
##########################################################
config DEVICETREE
	string
	default "devicetree.cb"

config MAINBOARD_PART_NUMBER
	string
	default "CN8100_SFF_EVB"

endif