## ## This file is part of the coreboot project. ## ## Copyright (C) 2007, 2009 Rudolf Marek ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License v2 as published by ## the Free Software Foundation. ## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. ## ## You should have received a copy of the GNU General Public License ## along with this program; if not, write to the Free Software ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## uses HAVE_MP_TABLE uses CONFIG_CBFS uses HAVE_PIRQ_TABLE uses USE_FALLBACK_IMAGE uses HAVE_FALLBACK_BOOT uses HAVE_HARD_RESET uses IRQ_SLOT_COUNT uses HAVE_OPTION_TABLE uses CONFIG_MAX_CPUS uses CONFIG_MAX_PHYSICAL_CPUS uses CONFIG_LOGICAL_CPUS uses CONFIG_IOAPIC uses CONFIG_SMP uses FALLBACK_SIZE uses ROM_SIZE uses ROM_SECTION_SIZE uses ROM_IMAGE_SIZE uses ROM_SECTION_SIZE uses ROM_SECTION_OFFSET uses CONFIG_ROM_PAYLOAD uses CONFIG_ROM_PAYLOAD_START uses PAYLOAD_SIZE uses _ROMBASE uses XIP_ROM_SIZE uses XIP_ROM_BASE uses STACK_SIZE uses HEAP_SIZE # uses USE_OPTION_TABLE uses CONFIG_LB_MEM_TOPK uses HAVE_ACPI_TABLES uses HAVE_MAINBOARD_RESOURCES uses HAVE_HIGH_TABLES uses HAVE_ACPI_RESUME uses HAVE_LOW_TABLES uses LB_CKS_RANGE_START uses LB_CKS_RANGE_END uses LB_CKS_LOC uses MAINBOARD uses MAINBOARD_PART_NUMBER uses MAINBOARD_VENDOR uses MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID uses MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID uses COREBOOT_EXTRA_VERSION uses _RAMBASE uses CONFIG_GDB_STUB uses CROSS_COMPILE uses CC uses HOSTCC uses OBJCOPY uses TTYS0_BAUD uses TTYS0_BASE uses TTYS0_LCS uses DEFAULT_CONSOLE_LOGLEVEL uses MAXIMUM_CONSOLE_LOGLEVEL uses MAINBOARD_POWER_ON_AFTER_POWER_FAIL uses CONFIG_CONSOLE_SERIAL8250 uses HAVE_INIT_TIMER uses CONFIG_GDB_STUB uses CONFIG_CONSOLE_VGA uses CONFIG_PCI_ROM_RUN # bx_b001- uses K8_HW_MEM_HOLE_SIZEK uses K8_HT_FREQ_1G_SUPPORT uses USE_DCACHE_RAM uses DCACHE_RAM_BASE uses DCACHE_RAM_SIZE uses DCACHE_RAM_GLOBAL_VAR_SIZE uses CONFIG_USE_INIT uses ENABLE_APIC_EXT_ID uses APIC_ID_OFFSET uses LIFT_BSP_APIC_ID uses HT_CHAIN_UNITID_BASE uses HT_CHAIN_END_UNITID_BASE # bx_b001- uses K8_SB_HT_CHAIN_ON_BUS0 uses SB_HT_CHAIN_UNITID_OFFSET_ONLY # bx_b005+ uses SB_HT_CHAIN_ON_BUS0 uses CONFIG_COMPRESSED_PAYLOAD_NRV2B uses CONFIG_COMPRESSED_PAYLOAD_LZMA uses CONFIG_USE_PRINTK_IN_CAR default ROM_SIZE = 512 * 1024 default FALLBACK_SIZE = 256 * 1024 default HAVE_FALLBACK_BOOT = 1 default HAVE_HARD_RESET = 1 default HAVE_PIRQ_TABLE = 0 default IRQ_SLOT_COUNT = 11 # FIXME? default HAVE_MP_TABLE = 0 default HAVE_OPTION_TABLE = 0 # FIXME # Move the default coreboot CMOS range off of AMD RTC registers. default LB_CKS_RANGE_START = 49 default LB_CKS_RANGE_END = 122 default LB_CKS_LOC = 123 default CONFIG_SMP = 1 default CONFIG_MAX_CPUS = 2 default CONFIG_MAX_PHYSICAL_CPUS = 1 default CONFIG_LOGICAL_CPUS = 1 default HAVE_ACPI_TABLES = 1 default HAVE_MAINBOARD_RESOURCES = 1 default HAVE_HIGH_TABLES = 1 default HAVE_LOW_TABLES = 0 default HAVE_ACPI_RESUME = 1 # 1G memory hole # bx_b001- default K8_HW_MEM_HOLE_SIZEK = 0x100000 # Opteron K8 1G HT support default K8_HT_FREQ_1G_SUPPORT = 1 # HT Unit ID offset, default is 1, the typical one. default HT_CHAIN_UNITID_BASE = 0x0 # Real SB Unit ID, default is 0x20, mean don't touch it at last. # default HT_CHAIN_END_UNITID_BASE = 0x0 # Make the SB HT chain on bus 0, default is not (0). # bx_b001- default K8_SB_HT_CHAIN_ON_BUS0 = 2 # bx_b005+ make the SB HT chain on bus 0. default SB_HT_CHAIN_ON_BUS0 = 1 # Only offset for SB chain?, default is yes(1). default SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0 default CONFIG_CONSOLE_VGA = 1 # Needed for VGA. default CONFIG_PCI_ROM_RUN = 0 # Needed for VGA. default USE_DCACHE_RAM = 1 default DCACHE_RAM_BASE = 0xcc000 default DCACHE_RAM_SIZE = 0x4000 default DCACHE_RAM_GLOBAL_VAR_SIZE = 0x01000 default CONFIG_USE_INIT = 0 default ENABLE_APIC_EXT_ID = 0 default APIC_ID_OFFSET = 0x10 default LIFT_BSP_APIC_ID = 0 default CONFIG_IOAPIC = 1 default MAINBOARD_VENDOR = "ASUS" default MAINBOARD_PART_NUMBER = "M2V-MX SE" default MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 0x1043 # default MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID = 0x1234 # FIXME default ROM_IMAGE_SIZE = 64 * 1024 default STACK_SIZE = 8 * 1024 default HEAP_SIZE = 256 * 1024 # More 1M for pgtbl. default CONFIG_LB_MEM_TOPK = 32768 # to 1MB default _RAMBASE = 0x1F00000 # default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE default CONFIG_ROM_PAYLOAD = 1 default CC = "$(CROSS_COMPILE)gcc -m32" default HOSTCC = "gcc" default CONFIG_GDB_STUB = 0 default CONFIG_USE_PRINTK_IN_CAR=1 default CONFIG_CONSOLE_SERIAL8250 = 1 default TTYS0_BAUD = 115200 default TTYS0_BASE = 0x3f8 default TTYS0_LCS = 0x3 # 8n1 default DEFAULT_CONSOLE_LOGLEVEL = 9 default MAXIMUM_CONSOLE_LOGLEVEL = 9 default MAINBOARD_POWER_ON_AFTER_POWER_FAIL = "MAINBOARD_POWER_ON" # # CBFS # # default CONFIG_CBFS=0 end