chip northbridge/amd/amdk8/root_complex		# Root complex
	device cpu_cluster 0 on			# (L)APIC cluster
		chip cpu/amd/socket_F				# CPU socket
			device lapic 0 on end			# Local APIC of the CPU
		end
	end
	device domain 0 on			# PCI domain
		subsystemid 0x1043 0x8162 inherit
		chip northbridge/amd/amdk8		# Northbridge / RAM controller
			register "maximum_memory_capacity" = "0x1000000000"	# 64GB
			device pci 18.0 on end		# Link 0 == LDT 0
			device pci 18.0 on		# Link 1 == LDT 1 [SB on link 1]
				chip southbridge/nvidia/ck804		# Southbridge
					device pci 0.0 on end			# HT
					device pci 1.0 on			# LPC
						chip superio/winbond/w83627thg	# Super I/O
							device pnp 2e.0 on		# Floppy
								# Set up interface resources
								io 0x60 = 0x3f0
								irq 0x70 = 6
								drq 0x74 = 2
							end
							device pnp 2e.1 off end		# Parallel port
							device pnp 2e.2 on		# Com1
								# Set up interface resources
								io 0x60 = 0x3f8
								irq 0x70 = 4
							end
							device pnp 2e.3 on		# Com2
								# Set up interface resources
								io 0x60 = 0x2f8
								irq 0x70 = 3
								# Select correct package I/O pins
								io 0xf1 = 0x04
							end
							device pnp 2e.5 on		# PS/2 keyboard & mouse
								# Set up interface resources
								io 0x60 = 0x60
								io 0x62 = 0x64
								irq 0x70 = 1
								irq 0x72 = 12
							end
							device pnp 2e.7 off end		# Game port, MIDI, GPIO 1 & 5
							device pnp 2e.8 off end		# GPIO 2
							device pnp 2e.9 on end		# GPIO 3, GPIO 4
							device pnp 2e.a off end		# ACPI
							device pnp 2e.b on		# Hardware monitor
								# Set up interface resources
								io 0x60 = 0x290
								irq 0x70 = 5
							end
						end
					end
					device pci 1.1 on			# SM 0
						chip drivers/generic/generic	# DIMM n-0-0-0
							device i2c 50 on end
						end
						chip drivers/generic/generic	# DIMM n-0-0-1
							device i2c 51 on end
						end
						chip drivers/generic/generic	# DIMM n-0-1-0
							device i2c 52 on end
						end
						chip drivers/generic/generic	# DIMM n-0-1-1
							device i2c 53 on end
						end
						chip drivers/generic/generic	# DIMM n-1-0-0
							device i2c 54 on end
						end
						chip drivers/generic/generic	# DIMM n-1-0-1
							device i2c 55 on end
						end
						chip drivers/generic/generic	# DIMM n-1-1-0
							device i2c 56 on end
						end
						chip drivers/generic/generic	# DIMM n-1-1-1
							device i2c 57 on end
						end
						chip drivers/i2c/w83793
							register "mfc" = "0x29"				# Enable FANIN1/FANIN12, FANIN9/FANIN10, and FANIN8/FANCTRL8 inputs
							register "fanin" = "0x7f"			# Enable monitoring of FANIN6 - FANIN12
							register "fanin_sel" = "0x0f"			# Connect FANIN9 - FANIN12 to pins 37 - 40
							register "peci_agent_conf" = "0x33"		# Set Intel CPU PECI agent domain (not used by AMD but may affect chip operation)
							register "tcase0" = "94"			# Set maximum Intel CPU case temperature to 94°C (not used by AMD but may affect chip operation)
							register "tcase1" = "94"			# Set maximum Intel CPU case temperature to 94°C (not used by AMD but may affect chip operation)
							register "tcase2" = "94"			# Set maximum Intel CPU case temperature to 94°C (not used by AMD but may affect chip operation)
							register "tcase3" = "94"			# Set maximum Intel CPU case temperature to 94°C (not used by AMD but may affect chip operation)
							register "tr_enable" = "0x03"			# Enable montoring of TR1 and TR2
							register "td_mode_select" = "0x05"		# Use internal temperature sensors and disable unconnected TD3/TD4
							register "td1_critical_temperature" = "85"	# Set TD1 (CPU0) critical temperature to 85°C
							register "td1_critical_hysteresis" = "80"	# Set TD1 (CPU0) critical hysteresis temperature to 80°C
							register "td1_warning_temperature" = "70"	# Set TD1 (CPU0) warning temperature to 70°C
							register "td1_warning_hysteresis" = "65"	# Set TD1 (CPU0) warning hysteresis temperature to 65°C
							register "td2_critical_temperature" = "85"	# Set TD2 (CPU1) critical temperature to 85°C
							register "td2_critical_hysteresis" = "80"	# Set TD2 (CPU1) critical hysteresis temperature to 80°C
							register "td2_warning_temperature" = "70"	# Set TD2 (CPU1) warning temperature to 70°C
							register "td2_warning_hysteresis" = "65"	# Set TD2 (CPU1) warning hysteresis temperature to 65°C
							register "tr1_critical_temperature" = "60"	# Set TR1 (mainboard) critical temperature to 60°C
							register "tr1_critical_hysteresis" = "55"	# Set TR1 (mainboard) critical hysteresis temperature to 55°C
							register "tr1_warning_temperature" = "50"	# Set TR1 (mainboard) warning temperature to 50°C
							register "tr1_warning_hysteresis" = "45"	# Set TR1 (mainboard) warning hysteresis temperature to 45°C
							register "critical_temperature" = "80"		# Set critical temperature to 80°C
							register "fanctrl1" = "0x48"			# Set Fan 4 and Fan 7 to output buffer mode, all others to open drain
							register "fanctrl2" = "0x01"			# Set Fan 4 to Fan 7 to output buffer mode, Fan 1 to DC mode
							register "first_valid_fan_number" = "2"		# Fan 1/Fan 2 controls and sensors are not connected to anything
							register "td1_fan_select" = "0x00"		# All fans to manual mode (no dependence on TD1)
							register "td2_fan_select" = "0x00"		# All fans to manual mode (no dependence on TD2)
							register "td3_fan_select" = "0x00"		# All fans to manual mode (no dependence on TD3)
							register "td4_fan_select" = "0x00"		# All fans to manual mode (no dependence on TD4)
							register "tr1_fan_select" = "0x00"		# All fans to manual mode (no dependence on TR1)
							register "tr2_fan_select" = "0x00"		# All fans to manual mode (no dependence on TR2)
							register "fan1_nonstop" = "7"			# Set Fan 1 minimum speed
							register "fan2_nonstop" = "7"			# Set Fan 2 minimum speed
							register "fan3_nonstop" = "7"			# Set Fan 3 minimum speed
							register "fan4_nonstop" = "7"			# Set Fan 4 minimum speed
							register "fan5_nonstop" = "7"			# Set Fan 5 minimum speed
							register "fan6_nonstop" = "7"			# Set Fan 6 minimum speed
							register "fan7_nonstop" = "7"			# Set Fan 7 minimum speed
							register "fan8_nonstop" = "7"			# Set Fan 8 minimum speed
							register "default_speed" = "100"		# All fans to full speed on power up
							register "fan1_duty" = "100"			# Fan 1 to full speed
							register "fan2_duty" = "100"			# Fan 2 to full speed
							register "fan3_duty" = "100"			# Fan 3 to full speed
							register "fan4_duty" = "100"			# Fan 4 to full speed
							register "fan5_duty" = "100"			# Fan 5 to full speed
							register "fan6_duty" = "100"			# Fan 6 to full speed
							register "fan7_duty" = "100"			# Fan 7 to full speed
							register "fan8_duty" = "100"			# Fan 8 to full speed
							register "vcorea_high_limit_mv" = "1500"	# VCOREA (Node 0) high limit to 1.5V
							register "vcorea_low_limit_mv" = "900"		# VCOREA (Node 0) low limit to 0.9V
							register "vcoreb_high_limit_mv" = "1500"	# VCOREB (Node 1) high limit to 1.5V
							register "vcoreb_low_limit_mv" = "900"		# VCOREB (Node 1) low limit to 0.9V
							register "vtt_high_limit_mv" = "1250"		# VTT (HT link voltage) high limit to 1.25V
							register "vtt_low_limit_mv" = "1150"		# VTT (HT link voltage) low limit to 1.15V
							register "vsen1_high_limit_mv" = "1900"		# VSEN1 (Node 0 RAM voltage) high limit to 1.9V
							register "vsen1_low_limit_mv" = "1700"		# VSEN1 (Node 0 RAM voltage) low limit to 1.7V
							register "vsen2_high_limit_mv" = "1900"		# VSEN2 (Node 1 RAM voltage) high limit to 1.9V
							register "vsen2_low_limit_mv" = "1700"		# VSEN2 (Node 1 RAM voltage) low limit to 1.7V
							register "vsen3_high_limit_mv" = "3500"		# VSEN3 (+3.3V) high limit to 3.5V
							register "vsen3_low_limit_mv" = "3100"		# VSEN3 (+3.3V) low limit to 3.1V
							register "vsen4_high_limit_mv" = "1070"		# VSEN4 (+12V, scaling factor ~12.15) high limit to 13V
							register "vsen4_low_limit_mv" = "905"		# VSEN4 (+12V, scaling factor ~12.15) low limit to 11V
							register "vdd_high_limit_mv" = "5200"		# 5VDD high limit to 5.2V
							register "vdd_low_limit_mv" = "4800"		# 5VDD low limit to 4.8V
							register "vsb_high_limit_mv" = "5200"		# 5VSB high limit to 5.2V
							register "vsb_low_limit_mv" = "4800"		# 5VSB low limit to 4.8V
							register "vbat_high_limit_mv" = "3500"		# VBAT (+3V) high limit to 3.5V
							register "vbat_low_limit_mv" = "2500"		# VBAT (+3V) low limit to 2.5V
							device i2c 0x2f on end
						end
					end
					device pci 1.1 on end			# SM 1
					device pci 2.0 on end			# USB 1.1
					device pci 2.1 on end			# USB 2
					device pci 4.0 off end			# AC'97 Audio (N/A)
					device pci 4.1 off end			# AC'97 Modem (N/A)
					device pci 6.0 on end			# IDE
					device pci 7.0 on end			# SATA 0
					device pci 8.0 on end			# SATA 1
					device pci 9.0 on			# Bridge
						device pci 4.0 on end		# VGA
					end
					device pci a.0 off end
					device pci b.0 on			# Bridge
						device pci 0.0 on end		# NIC A
					end
					device pci c.0 on			# Bridge
						device pci 0.0 on end		# LSI SAS
					end
					device pci d.0 on			# Bridge
						device pci 0.0 on end		# NIC B
					end
					device pci e.0 on			# Bridge
						# Slot				# PCI E 0
					end
					device pci f.0 off end
					register "ide0_enable" = "1"
					register "ide1_enable" = "1"
					register "sata0_enable" = "1"
					register "sata1_enable" = "1"
				end
			end
			device pci 18.0 on end		# Link 2 == LDT 2
			device pci 18.1 on end
			device pci 18.2 on end
			device pci 18.3 on end
			device pci 18.4 on end
			device pci 19.0 on end		# Link 0 == LDT 0
			device pci 19.0 on end		# Link 1 == LDT 1
			device pci 19.0 on end		# Link 2 == LDT 2
			device pci 19.1 on end
			device pci 19.2 on end
			device pci 19.3 on end
			device pci 19.4 on end
		end
	end
end