## SPDX-License-Identifier: GPL-2.0-or-later

chip northbridge/intel/sandybridge
	register "spd_addresses" = "{0x50, 0, 0x52, 0}"
	device domain 0 on
		device ref host_bridge on end		# Host bridge
		device ref peg10 on end		# PEG
		device ref igd on end		# iGPU

		chip southbridge/intel/bd82x6x
			register "sata_port_map" = "0x33"
			register "spi_lvscc" = "0x2005"
			register "spi_uvscc" = "0x2005"

			device ref mei1 on  end		# MEI #1
			device ref mei2 off end		# MEI #2
			device ref me_ide_r off end		# ME IDE-R
			device ref me_kt off end		# ME KT
			device ref gbe off end		# Intel GbE
			device ref ehci2 on  end		# EHCI #2
			device ref hda on  end		# HD Audio

			device ref pcie_rp1 off end		# RP #1
			device ref pcie_rp2 off end		# RP #2
			device ref pcie_rp3 off end		# RP #3
			device ref pcie_rp4 off end		# RP #4
			device ref pcie_rp5 off end		# RP #5
			device ref pcie_rp6 off end		# RP #6
			device ref pcie_rp7 off end		# RP #7
			device ref pcie_rp8 off end		# RP #8

			device ref ehci1 on  end		# EHCI #1
			device ref pci_bridge off end		# PCI bridge
			device ref lpc on  end		# LPC bridge
			device ref sata1 on  end		# SATA (AHCI)
			device ref smbus on  end		# SMBus
			device ref sata2 off end		# SATA (Legacy)
			device ref thermal off end		# Thermal
		end
	end
end