/* * This file is part of the coreboot project. * * Copyright (C) 2011 Advanced Micro Devices, Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; version 2 of the License. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ #include #include #include #include #include #include #include #include //#include #define ONE_MB 0x100000 //#define SMBUS_IO_BASE 0x6000 void set_pcie_reset(void); void set_pcie_dereset(void); /** * TODO * SB CIMx callback */ void set_pcie_reset(void) { } /** * TODO * mainboard specific SB CIMx callback */ void set_pcie_dereset(void) { } /************************************************* * enable the dedicated function in torpedo board. *************************************************/ static void torpedo_enable(device_t dev) { printk(BIOS_INFO, "Mainboard " CONFIG_MAINBOARD_PART_NUMBER " Enable. dev=0x%p\n", dev); setup_uma_memory(); } int add_mainboard_resources(struct lb_memory *mem) { return 0; } struct chip_operations mainboard_ops = { CHIP_NAME(CONFIG_MAINBOARD_VENDOR " " CONFIG_MAINBOARD_PART_NUMBER " Mainboard") .enable_dev = torpedo_enable, };