config CPU_INTEL_MODEL_106CX
	bool
	select ARCH_ALL_STAGES_X86_32
	select SSE2
	select UDELAY_TSC
	select TSC_MONOTONIC_TIMER
	select SIPI_VECTOR_IN_ROM
	select AP_IN_SIPI_WAIT
	select TSC_SYNC_MFENCE
	select SUPPORT_CPU_UCODE_IN_CBFS
	select SERIALIZED_SMM_INITIALIZATION
	select CPU_INTEL_COMMON
	select CPU_INTEL_COMMON_TIMEBASE

if CPU_INTEL_MODEL_106CX

config CPU_ADDR_BITS
	int
	default 32

endif