/* Copyright 2000 AG Electronics Ltd. */ /* This code is distributed without warranty under the GPL v2 (see COPYING) */ #define ASM #include "ppcreg.h" #include .section ".rom.reset", "ax", @progbits .globl _start _start: b system_reset %%EXCEPTION_VECTOR_TABLE%% .section ".rom.data", "a", @progbits .section ".rom.text", "ax", @progbits system_reset: %%EARLY_INIT%% start_payload: /* * Relocate payload (text & data) to ram */ lis r3, _liseg@ha addi r3, r3, _liseg@l lis r4, _iseg@ha addi r4, r4, _iseg@l /* * Skip if they're the same */ cmp 0, 0, r3, r4 beq 1f lis r7, _eliseg@ha addi r7, r7, _eliseg@l 2: lwzx r5, 0, r3 stwx r5, 0, r4 addi r3, r3, 4 addi r4, r4, 4 cmp 0, 0, r3, r7 ble 2b 1: /* * Start payload */ b _iseg %%NORTHBRIDGE_INIT%%