FSP 1.1

x86 FSP 1.1 Integration

Firmware Support Package (FSP) integration requires System-on-a-Chip (SoC) and board support. The combined steps are listed here. The development steps for FSP are listed below:

1. Required Files
2. Add the FSP Binary File to the coreboot File System
3. Enable coreboot/FSP Debugging

FSP Documentation:

• Intel® Firmware Support Package External Architecture Specification V1.1

Required Files

coreboot Required Files

1. Create the following directories if they do not already exist:
   • src/vendorcode/intel/fsp/fsp1_1/<Chip Family>
   • 3rdparty/blobs/mainboard/<Board Vendor>/<Board Name>
2. The following files may need to be copied from the FSP build or release into the directories above if they are not present or are out of date:
   • FspUpdVpd.h: src/vendorcode/intel/fsp/fsp1_1/<Chip Family>/FspUpdVpd.h
   • FSP.bin: 3rdparty/blobs/mainboard/<Board Vendor>/<Board Name>/fsp.bin

Add the FSP Binary File to coreboot File System

Add the FSP binary to the coreboot flash image using the following command:

util/cbfstool/cbfstool build/coreboot.rom add -t fsp -n fsp.bin -b <base address> -f fsp.bin

This command relocates the FSP binary to the 4K byte aligned location in CBFS so that the FSP code for TempRamInit may be executed in place.

Enable coreboot/FSP Debugging

Set the following Kconfig values:

• CONFIG_DISPLAY_FSP_ENTRY_POINTS - Display the FSP entry points in romstage
• CONFIG_DISPLAY_HOBS - Display and verify the hand-off-blocks (HOBs) returned by MemoryInit
• CONFIG_DISPLAY_VBT - Display Video BIOS Table (VBT) used for GOP
• CONFIG_DISPLAY_UPD_DATA - Display the user specified product data passed to MemoryInit and SiliconInit

Modified: 17 May 2016