x86 System on a Chip (SoC) Development

SoC development is best done in parallel with development for a specific board. The combined steps are listed here. The development steps for the SoC are listed below:

  1. FSP 1.1 required files
  2. SoC Required Files
  3. Start Booting
  4. Early Debug
  5. Bootblock

Required Files

Create the directory as src/soc/<Vendor>/<Chip Family>.

The following files are required to build a new SoC:

Start Booting

Some SoC parts require additional firmware components in the flash. This section describes how to add those pieces.

Intel Firmware Descriptor

The Intel Firmware Descriptor (IFD) is located at the base of the flash part. The following command overwrites the base of the flash image with the Intel Firmware Descriptor: 

dd if=descriptor.bin of=build/coreboot.rom conv=notrunc >/dev/null 2>&1

Management Engine Binary

Some SoC parts contain and require that the Management Engine (ME) be running before it is possible to bring the x86 processor out of reset. A binary file containing the management engine code must be added to the firmware using the ifdtool. The following commands add this binary blob: 

util/ifdtool/ifdtool -i ME:me.bin  build/coreboot.rom
mv build/coreboot.rom.new build/coreboot.rom

Early Debug

Early debugging between the reset vector and the time the serial port is enabled is most easily done by writing values to port 0x80.

Success

When the reset vector is successfully invoked, port 0x80 will output the following value:

Bootblock

Implement the bootblock using the following steps:

  1. Create the directory as src/soc/<Vendor>/<Chip Family>/bootblock
  2. Add the timestamp.inc file which initializes the floating point registers and saves the initial timestamp.
  3. Add the bootblock.c file which:
    1. Enables memory-mapped PCI config access
    2. Updates the microcode by calling intel_update_microcode_from_cbfs
    3. Enable ROM caching
  4. Edit the src/soc/<Vendor>/<Chip Family>/Kconfig file
    1. Add the BOOTBLOCK_CPU_INIT value to point to the bootblock.c file
    2. Add the CHIPSET_BOOTBLOCK_INCLUDE value to point to the timestamp.inc file
  5. Edit the src/soc/<Vendor>/<Chip Family>/Makefile.inc file
    1. Add the bootblock subdirectory
  6. Edit the src/soc/<Vendor>/<Chip Family>/memmap.c file
    1. Add the fsp/memmap.h include file
    2. Add the mmap_region_granularity routine
  7. Add the necessary .h files to define the necessary values and structures
  8. When successful port 0x80 will output the following values:
    1. 0x01: POST_RESET_VECTOR_CORRECT - Bootblock successfully executed the reset vector and entered the 16-bit code at _start
    2. 0x10: POST_ENTER_PROTECTED_MODE - Bootblock executing in 32-bit mode
    3. 0x10 - Verstage/romstage reached 32-bit mode

Build Note: The following files are included into the default bootblock image:

Modified: 31 January 2016