From 0120e1a3d8ebb450aed5016b4653ce4a7524295e Mon Sep 17 00:00:00 2001 From: Uwe Hermann Date: Sun, 16 Sep 2007 18:11:03 +0000 Subject: Split up superiotool.c into multiple source files, one per vendor. As there will be lots more supported Super I/Os soon, the file is really getting way too big... Signed-off-by: Uwe Hermann Acked-by: Uwe Hermann git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2777 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- util/superiotool/fintek.c | 149 ++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 149 insertions(+) create mode 100644 util/superiotool/fintek.c (limited to 'util/superiotool/fintek.c') diff --git a/util/superiotool/fintek.c b/util/superiotool/fintek.c new file mode 100644 index 0000000000..f7baaf6989 --- /dev/null +++ b/util/superiotool/fintek.c @@ -0,0 +1,149 @@ +/* + * This file is part of the LinuxBIOS project. + * + * Copyright (C) 2006 coresystems GmbH + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include "superiotool.h" + +void dump_fintek(unsigned short port, unsigned int did) +{ + switch (did) { + case 0x0604: + printf("Fintek F71805\n"); + break; + case 0x4103: + printf("Fintek F71872\n"); + break; + default: + printf("Unknown Fintek Super I/O: did=0x%04x\n", did); + return; + } + + printf("Flash write is %s.\n", + regval(port, 0x28) & 0x80 ? "enabled" : "disabled"); + printf("Flash control is 0x%04x.\n", regval(port, 0x28)); + printf("27=%02x\n", regval(port, 0x27)); + printf("29=%02x\n", regval(port, 0x29)); + printf("2a=%02x\n", regval(port, 0x2a)); + printf("2b=%02x\n", regval(port, 0x2b)); + + /* Select UART 1. */ + regwrite(port, 0x07, 0x01); + printf("UART1 is %s\n", + regval(port, 0x30) & 1 ? "enabled" : "disabled"); + printf("UART1 base=%02x%02x, irq=%02x, mode=%s\n", regval(port, 0x60), + regval(port, 0x61), regval(port, 0x70) & 0x0f, + regval(port, 0xf0) & 0x10 ? "RS485" : "RS232"); + + /* Select UART 2. */ + regwrite(port, 0x07, 0x02); + printf("UART2 is %s\n", + regval(port, 0x30) & 1 ? "enabled" : "disabled"); + printf("UART2 base=%02x%02x, irq=%02x, mode=%s\n", regval(port, 0x60), + regval(port, 0x61), regval(port, 0x70) & 0x0f, + regval(port, 0xf0) & 0x10 ? "RS485" : "RS232"); + + /* Select parallel port. */ + regwrite(port, 0x07, 0x03); + printf("PARPORT is %s\n", + regval(port, 0x30) & 1 ? "enabled" : "disabled"); + printf("PARPORT base=%02x%02x, irq=%02x\n", regval(port, 0x60), + regval(port, 0x61), regval(port, 0x70) & 0x0f); + + /* Select HW monitor. */ + regwrite(port, 0x07, 0x04); + printf("HW monitor is %s\n", + regval(port, 0x30) & 1 ? "enabled" : "disabled"); + printf("HW monitor base=%02x%02x, irq=%02x\n", regval(port, 0x60), + regval(port, 0x61), regval(port, 0x70) & 0x0f); + + /* Select GPIO. */ + regwrite(port, 0x07, 0x05); + printf("GPIO is %s\n", regval(port, 0x30) & 1 ? "enabled" : "disabled"); + printf + ("GPIO 70=%02x, e0=%02x, e1=%02x, e2=%02x, e3=%02x, e4=%02x, e5=%02x\n", + regval(port, 0x70), regval(port, 0xe0), regval(port, 0xe1), + regval(port, 0xe2), regval(port, 0xe3), regval(port, 0xe4), + regval(port, 0xe5)); + printf + ("GPIO e6=%02x, e7=%02x, e8=%02x, e9=%02x, f0=%02x, f1=%02x, f3=%02x, f4=%02x\n", + regval(port, 0xe6), regval(port, 0xe7), regval(port, 0xe8), + regval(port, 0xe9), regval(port, 0xf0), regval(port, 0xf1), + regval(port, 0xf3), regval(port, 0xf4)); + printf("GPIO f5=%02x, f6=%02x, f7=%02x, f8=%02x\n", regval(port, 0xf5), + regval(port, 0xf6), regval(port, 0xf7), regval(port, 0xf8)); +} + +void probe_idregs_fintek(unsigned short port) +{ + unsigned int vid, did, success = 0; + + /* Enable configuration sequence (Fintek uses this for example) + * Older ITE chips have the same enable sequence. + */ + outb(0x87, port); + outb(0x87, port); + + outb(0x20, port); + if (inb(port) != 0x20) { + if (inb(port) == 0xff) + printf("No Super I/O chip found at 0x%04x\n", port); + else + printf("Probing 0x%04x, failed (0x%02x), data returns 0x%02x\n", port, inb(port), inb(port + 1)); + return; + } + did = inb(port + 1); + did |= (regval(port, 0x21) << 8); + + vid = regval(port, 0x23); + vid |= (regval(port, 0x24) << 8); + + printf("Super I/O found at 0x%02x: vid=0x%04x/did=0x%04x\n", + port, vid, did); + + if (vid == 0xff || vid == 0xffff) + return; + + /* printf("%s\n", familyid[id]); */ + switch (did) { + case 0x0887: /* Pseudoreversed for ITE8708 */ + case 0x1087: /* Pseudoreversed for ITE8710 */ + success = 1; + dump_ite(port, ((did & 0xff) << 8) | ((did & 0xff00) >> 8)); + regwrite(port, 0x02, 0x02); /* Exit MB PnP mode. */ + break; + default: + break; + } + + switch (vid) { + case 0x3419: + success = 1; + dump_fintek(port, did); + break; + default: + break; + } + + if (!success) + printf("No dump for vid 0x%04x, did 0x%04x\n", vid, did); + + /* Exit MB PnP mode (for Fintek, doesn't hurt ITE). */ + outb(0xaa, port); +} + -- cgit v1.2.3