From 0e5b713d32d09751155746ab2950f2addd184096 Mon Sep 17 00:00:00 2001 From: Tim Wawrzynczak Date: Fri, 6 Aug 2021 09:29:30 -0600 Subject: util/spd_tools/lp4x: Update README The lp4x spd_tools also support Alder Lake (ADL), so update the the README to reflect this fact. Signed-off-by: Tim Wawrzynczak Change-Id: Iedb1ea1c3558e5f179feac2c725667db5b327b2e Reviewed-on: https://review.coreboot.org/c/coreboot/+/56857 Reviewed-by: Furquan Shaikh Tested-by: build bot (Jenkins) --- util/spd_tools/lp4x/README.md | 19 ++++++++++--------- 1 file changed, 10 insertions(+), 9 deletions(-) (limited to 'util/spd_tools/lp4x/README.md') diff --git a/util/spd_tools/lp4x/README.md b/util/spd_tools/lp4x/README.md index e614f259cf..d74ed6b08b 100644 --- a/util/spd_tools/lp4x/README.md +++ b/util/spd_tools/lp4x/README.md @@ -1,15 +1,16 @@ # LPDDR4x SPD tools README Tools for generating SPD files for LPDDR4x memory used in memory down -configurations on Intel Tiger Lake (TGL) and Jasper Lake (JSL) based -platforms. These tools generate SPDs following JESD209-4C -specification and Intel recommendations (doc #616599, #610202) for -LPDDR4x SPD. +configurations on Intel Tiger Lake (TGL), Jasper Lake (JSL), and Alder +Lake (ADL) based platforms. These tools generate SPDs following +JESD209-4C specification and Intel recommendations (doc #616599, +#610202, #634730) for LPDDR4x SPD. -There are two tools provided that assist TGL and JSL based mainboards -to generate SPDs and Makefile to integrate these SPDs in coreboot -build. These tools can also be used to allocate DRAM IDs (configure -DRAM hardware straps) for any LPDDR4x memory part used by the board. +There are two tools provided that assist TGL, JSL and ADL based +mainboards to generate SPDs and Makefile to integrate these SPDs in +coreboot build. These tools can also be used to allocate DRAM IDs +(configure DRAM hardware straps) for any LPDDR4x memory part used by the +board. * gen_spd.go: Generates de-duplicated SPD files using a global memory part list provided by the mainboard in JSON format. Additionally, @@ -32,7 +33,7 @@ This program takes as input: attributes as per the datasheet. This is the list of all known LPDDR4x memory parts irrespective of their usage on the board. * SoC platform name for which the SPDs are being generated. Currently - supported platform names are `TGL` and `JSL`. + supported platform names are `TGL`, `JSL` and `ADL`. Input JSON file requires the following two fields for every memory part: * `name`: Name of the memory part -- cgit v1.2.3