From f894fcc0311c7f42e7270e6083b9792bcbee97cd Mon Sep 17 00:00:00 2001
From: Frank Wu <frank_wu@compal.corp-partner.google.com>
Date: Fri, 10 Sep 2021 14:43:45 +0800
Subject: util: Add DDR4 generic SPD for 4JQA-0622AD

Add SPD support for DDR4 memory part

BUG=b:199469240
TEST=none

Signed-off-by: Frank Wu <frank_wu@compal.corp-partner.google.com>
Change-Id: Ie67cf6b90304f0bcf80838866c7461c0cea86dc3
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57550
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kangheui Won <khwon@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
---
 util/spd_tools/ddr4/global_ddr4_mem_parts.json.txt | 11 +++++++++++
 1 file changed, 11 insertions(+)

(limited to 'util/spd_tools/ddr4')

diff --git a/util/spd_tools/ddr4/global_ddr4_mem_parts.json.txt b/util/spd_tools/ddr4/global_ddr4_mem_parts.json.txt
index 18e605275c..66be6a9daf 100644
--- a/util/spd_tools/ddr4/global_ddr4_mem_parts.json.txt
+++ b/util/spd_tools/ddr4/global_ddr4_mem_parts.json.txt
@@ -238,6 +238,17 @@
                 "packageBusWidth": 16,
                 "ranksPerPackage": 1
             }
+        },
+        {
+            "name": "4JQA-0622AD",
+            "attribs": {
+                "speedMTps": 3200,
+                "CL_nRCD_nRP": 22,
+                "capacityPerDieGb": 8,
+                "diesPerPackage": 1,
+                "packageBusWidth": 16,
+                "ranksPerPackage": 1
+            }
         }
     ]
 }
-- 
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