From 913ea9278f50b73427a50a54e91f8d5502d93219 Mon Sep 17 00:00:00 2001 From: Nick Vaccaro Date: Thu, 27 Aug 2020 11:44:38 -0700 Subject: util/gen_spd: translate DeviceBusWidth to die bus width If a memory part is a x16 part that has two dies and only a single rank, then the x16 describes the part width (since this solution will need to be a stacked solution) and as such, we must translate the DeviceBusWidth to the "die bus width" instead. Change DeviceBusWidth variable name to PackageBusWidth to be more descriptive BUG=b:166645306, b:160157545 TEST=run gen_spd and verify that spds for parts matching description above changed appropriately. Change-Id: Ia6f3ca109d344b7a015da28125a94ce10d2bdfb8 Signed-off-by: Nick Vaccaro Reviewed-on: https://review.coreboot.org/c/coreboot/+/44870 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh --- util/spd_tools/ddr4/README.md | 6 ++-- util/spd_tools/ddr4/gen_spd.go | 40 ++++++++++++++++------ util/spd_tools/ddr4/global_ddr4_mem_parts.json.txt | 6 ++-- 3 files changed, 35 insertions(+), 17 deletions(-) (limited to 'util/spd_tools/ddr4') diff --git a/util/spd_tools/ddr4/README.md b/util/spd_tools/ddr4/README.md index 646d937d9b..75275441a2 100644 --- a/util/spd_tools/ddr4/README.md +++ b/util/spd_tools/ddr4/README.md @@ -59,7 +59,7 @@ Input JSON file requires the following two fields for every memory part: * `diesPerPackage`: Number of dies on the part. Valid values: `1, 2` dies per package. -* `deviceBusWidth`: Number of bits of the device's address bus. Valid values: +* `packageBusWidth`: Number of bits of the device's address bus. Valid values: `8, 16` bit-wide bus. NOTE: Width of x4 is not supported by this tool. * `ranksPerPackage`: From Jedec doc 4_01_02_AnnexL-1R23: @@ -145,7 +145,7 @@ string like "9 10 11 12 14". "CL_nRCD_nRP": 22 "capacityPerDieGb": 8, "diesPerPackage": 2, - "deviceBusWidth": 16, + "packageBusWidth": 16, "ranksPerPackage": 1, } }, @@ -156,7 +156,7 @@ string like "9 10 11 12 14". "CL_nRCD_nRP": 22 "capacityPerDieGb": 8, "diesPerPackage": 1, - "deviceBusWidth": 16, + "packageBusWidth": 16, "ranksPerPackage": 2, "casLatencies": "9 10 11 12 13 14 15 16 17 18 19 20", "tCKMaxPs": "1250" diff --git a/util/spd_tools/ddr4/gen_spd.go b/util/spd_tools/ddr4/gen_spd.go index e3fa732179..3c8f71a263 100644 --- a/util/spd_tools/ddr4/gen_spd.go +++ b/util/spd_tools/ddr4/gen_spd.go @@ -47,7 +47,7 @@ type memAttributes struct { CL_nRCD_nRP int CapacityPerDieGb int DiesPerPackage int - DeviceBusWidth int + PackageBusWidth int RanksPerPackage int /* @@ -79,6 +79,9 @@ type memAttributes struct { CASSecondByte byte CASThirdByte byte CASFourthByte byte + + /* The following is for internal-use only and is not overridable */ + dieBusWidth int } /* This encodes the density in Gb to SPD low nibble value as per JESD 4.1.2.L-5 R29 */ @@ -179,7 +182,7 @@ var speedBinToSPDEncoding = map[int]speedBinAttributes { func getBankGroups(memAttribs *memAttributes) byte { var bg byte - switch memAttribs.DeviceBusWidth { + switch memAttribs.PackageBusWidth { case 8: bg = 4 case 16: @@ -296,7 +299,7 @@ func encodeRanks(ranks int) byte { func encodeModuleOrganization(memAttribs *memAttributes) byte { var b byte - b = encodeDataWidth(memAttribs.DeviceBusWidth) + b = encodeDataWidth(memAttribs.dieBusWidth) b |= encodeRanks(memAttribs.RanksPerPackage) return b @@ -390,20 +393,21 @@ func encodeTRCMinLsb(memAttribs *memAttributes) byte { return byte(convPsToMtb(memAttribs.TRCMinPs) & 0xff) } +/* This takes memAttribs.PackageBusWidth as an index */ var pageSizefromBusWidthEncoding = map[int]int { 8: 1, 16: 2, } /* - * Per Table 69 & Table 70 of Jedec JESD79-4C + * Per Table 169 & Table 170 of Jedec JESD79-4C * tFAW timing is based on : * Speed bin and page size */ func getTFAWMinPs(memAttribs *memAttributes) int { var tFAWFixed int - if pageSizefromBusWidthEncoding[memAttribs.DeviceBusWidth] == 1 { + if pageSizefromBusWidthEncoding[memAttribs.PackageBusWidth] == 1 { switch memAttribs.SpeedMTps { case 1600: tFAWFixed = 25000 @@ -412,7 +416,7 @@ func getTFAWMinPs(memAttribs *memAttributes) int { default: tFAWFixed = 21000 } - } else if pageSizefromBusWidthEncoding[memAttribs.DeviceBusWidth] == 2 { + } else if pageSizefromBusWidthEncoding[memAttribs.PackageBusWidth] == 2 { switch memAttribs.SpeedMTps { case 1600: tFAWFixed = 35000 @@ -433,7 +437,7 @@ func updateTFAWMin(memAttribs *memAttributes) { memAttribs.TFAWMinPs = getTFAWMinPs(memAttribs) } - switch pageSizefromBusWidthEncoding[memAttribs.DeviceBusWidth] { + switch pageSizefromBusWidthEncoding[memAttribs.PackageBusWidth] { case 1: tFAWFromTck = 20 * memAttribs.TCKMinPs case 2: @@ -470,7 +474,7 @@ func getTRRDLMinPs(memAttribs *memAttributes) int { * Per JESD79-4C Tables 169 & 170, tRRD_L is based on : * Speed bin and page size */ - switch pageSizefromBusWidthEncoding[memAttribs.DeviceBusWidth] { + switch pageSizefromBusWidthEncoding[memAttribs.PackageBusWidth] { case 1: switch memAttribs.SpeedMTps { case 1600: @@ -527,7 +531,7 @@ var speedToTRRDSMinPsTwoKPageSize = map[int]int { func getTRRDSMinPs(memAttribs *memAttributes) int { var tRRDFixed int - switch pageSizefromBusWidthEncoding[memAttribs.DeviceBusWidth] { + switch pageSizefromBusWidthEncoding[memAttribs.PackageBusWidth] { case 1: tRRDFixed = speedToTRRDSMinPsOneKPageSize[memAttribs.SpeedMTps] case 2: @@ -1041,7 +1045,7 @@ func validateDiesPerPackage(dieCount int) error { return fmt.Errorf("Incorrect dies per package count: ", dieCount) } -func validateDeviceBusWidth(width int) error { +func validatePackageBusWidth(width int) error { if width != 8 && width != 16 { return fmt.Errorf("Incorrect device bus width: ", width) } @@ -1095,7 +1099,7 @@ func validateMemoryParts(memParts *memParts) error { if err := validateDiesPerPackage(memParts.MemParts[i].Attribs.DiesPerPackage); err != nil { return err } - if err := validateDeviceBusWidth(memParts.MemParts[i].Attribs.DeviceBusWidth); err != nil { + if err := validatePackageBusWidth(memParts.MemParts[i].Attribs.PackageBusWidth); err != nil { return err } if err := validateRanksPerPackage(memParts.MemParts[i].Attribs.RanksPerPackage); err != nil { @@ -1254,6 +1258,19 @@ func getDefaultCASLatencies(memAttribs *memAttributes) string { return str } +func updateDieBusWidth(memAttribs *memAttributes) { + if memAttribs.PackageBusWidth == 16 && memAttribs.RanksPerPackage == 1 && + memAttribs.DiesPerPackage == 2 { + /* + * If a x16 part has 2 die with single rank, PackageBusWidth + * needs to be converted to match die bus width. + */ + memAttribs.dieBusWidth = 8 + } else { + memAttribs.dieBusWidth = memAttribs.PackageBusWidth + } +} + func updateCAS(memAttribs *memAttributes) error { if len(memAttribs.CASLatencies) == 0 { memAttribs.CASLatencies = getDefaultCASLatencies(memAttribs) @@ -1335,6 +1352,7 @@ func updateTWTRMin(memAttribs *memAttributes) { } func updateMemoryAttributes(memAttribs *memAttributes) { + updateDieBusWidth(memAttribs) updateTCK(memAttribs) updateTAAMin(memAttribs) updateTRCDMin(memAttribs) diff --git a/util/spd_tools/ddr4/global_ddr4_mem_parts.json.txt b/util/spd_tools/ddr4/global_ddr4_mem_parts.json.txt index 51068d5154..b2acf9ea82 100644 --- a/util/spd_tools/ddr4/global_ddr4_mem_parts.json.txt +++ b/util/spd_tools/ddr4/global_ddr4_mem_parts.json.txt @@ -10,7 +10,7 @@ "CL_nRCD_nRP": 22, "capacityPerDieGb": 8, "diesPerPackage": 1, - "deviceBusWidth": 16, + "packageBusWidth": 16, "ranksPerPackage": 1 } }, @@ -21,7 +21,7 @@ "CL_nRCD_nRP": 22, "capacityPerDieGb": 8, "diesPerPackage": 1, - "deviceBusWidth": 16, + "packageBusWidth": 16, "ranksPerPackage": 1 } }, @@ -32,7 +32,7 @@ "CL_nRCD_nRP": 22, "capacityPerDieGb": 8, "diesPerPackage": 2, - "deviceBusWidth": 16, + "packageBusWidth": 16, "ranksPerPackage": 1 } } -- cgit v1.2.3