From ca2ed9f450682c5f23ee1f3affac8b6dba7fdc0b Mon Sep 17 00:00:00 2001 From: Justin TerAvest Date: Wed, 17 Jan 2018 16:36:30 -0800 Subject: sconfig: Add a new mmio resource type Add support for a mmio resource in the devicetree to allow memory-mapped IO addresses to be assigned to given values. AMD platforms perform a significant amount of configuration through these MMIO addresses, including I2C bus configuration. BUG=b:72121803 Change-Id: I5608721c22c1b229f527815b5f17fff3a080c3c8 Signed-off-by: Justin TerAvest Reviewed-on: https://review.coreboot.org/23319 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin Reviewed-by: Furquan Shaikh --- util/sconfig/sconfig.y | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'util/sconfig/sconfig.y') diff --git a/util/sconfig/sconfig.y b/util/sconfig/sconfig.y index 7108e67a3a..05fb751f6e 100755 --- a/util/sconfig/sconfig.y +++ b/util/sconfig/sconfig.y @@ -29,7 +29,7 @@ static struct device *cur_parent, *cur_bus; int number; } -%token CHIP DEVICE REGISTER BOOL BUS RESOURCE END EQUALS HEX STRING PCI PNP I2C APIC CPU_CLUSTER CPU DOMAIN IRQ DRQ IO NUMBER SUBSYSTEMID INHERIT IOAPIC_IRQ IOAPIC PCIINT GENERIC SPI +%token CHIP DEVICE REGISTER BOOL BUS RESOURCE END EQUALS HEX STRING PCI PNP I2C APIC CPU_CLUSTER CPU DOMAIN IRQ DRQ IO NUMBER SUBSYSTEMID INHERIT IOAPIC_IRQ IOAPIC PCIINT GENERIC SPI MMIO %% devtree: { cur_parent = cur_bus = head; } chip { postprocess_devtree(); } ; -- cgit v1.2.3