From 5ade04a436c151d88fc02ca18e2de990d7b569dd Mon Sep 17 00:00:00 2001 From: Eric Biederman Date: Wed, 22 Oct 2003 04:03:46 +0000 Subject: - Update romcc to version 0.37 git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1225 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- util/romcc/tests/linux_test8.c | 39 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) create mode 100644 util/romcc/tests/linux_test8.c (limited to 'util/romcc/tests/linux_test8.c') diff --git a/util/romcc/tests/linux_test8.c b/util/romcc/tests/linux_test8.c new file mode 100644 index 0000000000..adee3c108d --- /dev/null +++ b/util/romcc/tests/linux_test8.c @@ -0,0 +1,39 @@ +#include "linux_syscall.h" +#include "linux_console.h" + +struct mem_param { + unsigned char cycle_time; + unsigned char divisor; + unsigned char tRC; + unsigned char tRFC; + unsigned dch_memclk; + unsigned short dch_tref4k, dch_tref8k; + unsigned char dtl_twr; + char name[9]; +}; + +static void test(void) +{ + static const struct mem_param param0 = { + .name = "166Mhz\r\n", + .cycle_time = 0x60, + .divisor = (6<<1), + .tRC = 0x3C, + .tRFC = 0x48, + .dch_memclk = 5 << 20, + .dch_tref4k = 0x02, + .dch_tref8k = 0x0A, + .dtl_twr = 3, + }; + int value; + unsigned clocks; + const struct mem_param *param; + param = ¶m0; + value = 0x48; + /* This used to generate 32bit loads instead of 8 bit loads */ + clocks = (value + (param->divisor << 1) - 1)/(param->divisor << 1); + print_debug("clocks: "); + print_debug_hex32(clocks); + print_debug("\r\n"); + _exit(0); +} -- cgit v1.2.3