From 4fbab545b2a99407ff444a29730c443aee4f24db Mon Sep 17 00:00:00 2001 From: Felix Held Date: Mon, 31 May 2021 19:44:46 +0200 Subject: mainboards using soc/amd/picasso: use aliases for PCIe devices on bus 0 Signed-off-by: Felix Held Change-Id: Ia6199c70163d32467abe5ba5da55c73ff62ba10f Reviewed-on: https://review.coreboot.org/c/coreboot/+/55103 Tested-by: build bot (Jenkins) Reviewed-by: Raul Rangel --- util/mainboard/google/trembyle/template/overridetree.cb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'util/mainboard') diff --git a/util/mainboard/google/trembyle/template/overridetree.cb b/util/mainboard/google/trembyle/template/overridetree.cb index d09c942296..52607d14c9 100644 --- a/util/mainboard/google/trembyle/template/overridetree.cb +++ b/util/mainboard/google/trembyle/template/overridetree.cb @@ -37,7 +37,7 @@ chip soc/amd/picasso # See AMD 55570-B1 Table 13: PCI Device ID Assignments. device domain 0 on subsystemid 0x1022 0x1510 inherit - device pci 1.7 on end # GPP Bridge 6 - NVME + device ref gpp_bridge_6 on end # NVME end # domain device mmio 0xfedc4000 on end -- cgit v1.2.3