From 312fc96874ff2b3fd1a839b72dd10edb1b8937b8 Mon Sep 17 00:00:00 2001 From: Idwer Vollering Date: Fri, 17 Dec 2010 22:34:58 +0000 Subject: inteltool: Model 0xf2x, ICH5, i865 support. Add support for dumping the MSRs on model_f2x and dumping GPIOs and PM registers on ICH5. Add ICH5 and i865 to the supported chips list. Enable the dumping of BAR6 on i865. Sample output: Disabling memory access: $ sudo setpci -s 6.0 0x04.b=0x0 $ sudo ./inteltool -m | head -n 9 Intel CPU: Processor Type: 0, Family f, Model 2, Stepping 7 Intel Northbridge: 8086:2570 (i865) Intel Southbridge: 8086:24d0 (ICH5) ============= MCHBAR ============ Access to BAR6 is currently disabled, attempting to enable. Enabled successfully. BAR6 = 0xfecf0000 (MEM) Signed-off-by: Idwer Vollering Acked-by: Joseph Smith Acked-by: Peter Stuge Acked-by: Uwe Hermann git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6197 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- util/inteltool/powermgt.c | 32 +++++++++++++++++++++++++++++++- 1 file changed, 31 insertions(+), 1 deletion(-) (limited to 'util/inteltool/powermgt.c') diff --git a/util/inteltool/powermgt.c b/util/inteltool/powermgt.c index 1a7317a319..a2ac32e1a9 100644 --- a/util/inteltool/powermgt.c +++ b/util/inteltool/powermgt.c @@ -297,6 +297,32 @@ static const io_register_t ich6_pm_registers[] = { { 0x54, 4, "C3_RES (Mobile Only)" }, }; +static const io_register_t ich5_pm_registers[] = { + { 0x00, 2, "PM1_STS" }, + { 0x02, 2, "PM1_EN" }, + { 0x04, 4, "PM1_CNT" }, + { 0x08, 4, "PM1_TMR" }, + { 0x0c, 4, "RESERVED" }, + { 0x10, 4, "PROC_CNT" }, + { 0x14, 3, "RESERVED" }, + { 0x17, 9, "RESERVED" }, + { 0x20, 1, "RESERVED" }, + { 0x28, 4, "GPE0_STS" }, + { 0x2c, 4, "GPE0_EN" }, + { 0x30, 4, "SMI_EN" }, + { 0x34, 4, "SMI_STS" }, + { 0x38, 2, "ALT_GP_SMI_EN" }, + { 0x3a, 2, "ALT_GP_SMI_STS" }, + { 0x3c, 4, "RESERVED" }, + { 0x40, 1, "MON_SMI" }, + { 0x42, 2, "RESERVED" }, + { 0x44, 1, "DEVACT_STS" }, + { 0x48, 1, "DEVTRAP_EN" }, + { 0x50, 1, "RESERVED" }, + { 0x51, 15, "RESERVED" }, + { 0x60, 16, "RESERVED" }, +}; + static const io_register_t ich4_pm_registers[] = { { 0x00, 2, "PM1_STS" }, { 0x02, 2, "PM1_EN" }, @@ -569,6 +595,11 @@ int print_pmbase(struct pci_dev *sb, struct pci_access *pacc) pm_registers = ich6_pm_registers; size = ARRAY_SIZE(ich6_pm_registers); break; + case PCI_DEVICE_ID_INTEL_ICH5: + pmbase = pci_read_word(sb, 0x40) & 0xfffc; + pm_registers = ich5_pm_registers; + size = ARRAY_SIZE(ich5_pm_registers); + break; case PCI_DEVICE_ID_INTEL_ICH4: pmbase = pci_read_word(sb, 0x40) & 0xfffc; pm_registers = ich4_pm_registers; @@ -629,4 +660,3 @@ int print_pmbase(struct pci_dev *sb, struct pci_access *pacc) return 0; } - -- cgit v1.2.3