From ec32e61bb8da1d5370b8dd808ca4dbbfb2acd6c8 Mon Sep 17 00:00:00 2001 From: Maxim Polyakov Date: Fri, 16 Aug 2019 19:15:12 +0300 Subject: inteltool: add Lewisburg family C62x chipset PCI IDs These changes are in accordance with the documentation: [*] page 39, Intel(R) C620 Series Chipset Platform Controller Hub (PCH) Datasheet, May 2019. Document Number: 336067-007US Change-Id: I7a1ae0cc4c5d4b02599dfafd30f4a87b3ce74b74 Signed-off-by: Maxim Polyakov Reviewed-on: https://review.coreboot.org/c/coreboot/+/34941 Reviewed-by: Felix Held Reviewed-by: Nico Huber Tested-by: build bot (Jenkins) --- util/inteltool/inteltool.h | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'util/inteltool/inteltool.h') diff --git a/util/inteltool/inteltool.h b/util/inteltool/inteltool.h index 483c93099e..23b6d1d55f 100644 --- a/util/inteltool/inteltool.h +++ b/util/inteltool/inteltool.h @@ -170,6 +170,20 @@ static inline uint32_t inl(unsigned port) #define PCI_DEVICE_ID_INTEL_QM175 0xa153 #define PCI_DEVICE_ID_INTEL_CM238 0xa154 +#define PCI_DEVICE_ID_INTEL_C621 0xa1c1 +#define PCI_DEVICE_ID_INTEL_C622 0xa1c2 +#define PCI_DEVICE_ID_INTEL_C624 0xa1c3 +#define PCI_DEVICE_ID_INTEL_C625 0xa1c4 +#define PCI_DEVICE_ID_INTEL_C626 0xa1c5 +#define PCI_DEVICE_ID_INTEL_C627 0xa1c6 +#define PCI_DEVICE_ID_INTEL_C628 0xa1c7 +#define PCI_DEVICE_ID_INTEL_C629 0xa1ca +#define PCI_DEVICE_ID_INTEL_C624_SUPER 0xa242 +#define PCI_DEVICE_ID_INTEL_C627_SUPER_1 0xa243 +#define PCI_DEVICE_ID_INTEL_C621_SUPER 0xa244 +#define PCI_DEVICE_ID_INTEL_C627_SUPER_2 0xa245 +#define PCI_DEVICE_ID_INTEL_C628_SUPER 0xa246 + #define PCI_DEVICE_ID_INTEL_H310 0xa303 #define PCI_DEVICE_ID_INTEL_H370 0xa304 #define PCI_DEVICE_ID_INTEL_Z390 0xa305 -- cgit v1.2.3