From 601da481b5437c7a73f97a1bece5990a393037d8 Mon Sep 17 00:00:00 2001 From: Damien Zammit Date: Mon, 26 May 2014 23:00:23 +1000 Subject: util/inteltool: Add pci ids for 4 northbridge models instead of 1. This patch supports northbridges: 0x0150 0x0154 0x0158 0x015c as 3rd gen core. Tested on 0x0150 (0x0154 previously only model). Change-Id: I53a33d864494dd4ac1cb9e8330450f56001ed92c Signed-off-by: Damien Zammit Reviewed-on: http://review.coreboot.org/5873 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi Reviewed-by: Edward O'Callaghan Reviewed-by: Paul Menzel --- util/inteltool/inteltool.h | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'util/inteltool/inteltool.h') diff --git a/util/inteltool/inteltool.h b/util/inteltool/inteltool.h index 88008e4e17..a06c70d5c4 100644 --- a/util/inteltool/inteltool.h +++ b/util/inteltool/inteltool.h @@ -154,7 +154,10 @@ #define PCI_DEVICE_ID_INTEL_CORE_0TH_GEN 0xd132 /* Nehalem */ #define PCI_DEVICE_ID_INTEL_CORE_1ST_GEN 0x0044 /* Westmere */ #define PCI_DEVICE_ID_INTEL_CORE_2ND_GEN 0x0104 /* Sandy Bridge */ -#define PCI_DEVICE_ID_INTEL_CORE_3RD_GEN 0x0154 /* Ivy Bridge */ +#define PCI_DEVICE_ID_INTEL_CORE_3RD_GEN_A 0x0150 /* Ivy Bridge */ +#define PCI_DEVICE_ID_INTEL_CORE_3RD_GEN_B 0x0154 /* Ivy Bridge */ +#define PCI_DEVICE_ID_INTEL_CORE_3RD_GEN_C 0x0158 /* Ivy Bridge */ +#define PCI_DEVICE_ID_INTEL_CORE_3RD_GEN_D 0x015c /* Ivy Bridge */ #define PCI_DEVICE_ID_INTEL_CORE_4TH_GEN 0x0c04 /* Haswell */ #define ARRAY_SIZE(a) ((int)(sizeof(a) / sizeof((a)[0]))) -- cgit v1.2.3