From 03646bebbea8f2f4cace53be797dc727413ae69d Mon Sep 17 00:00:00 2001 From: Stefan Reinauer Date: Tue, 13 May 2008 22:14:21 +0000 Subject: Add new revised inteltool that dumps all kinds of chipset information and drop old gpio_dump utility. Signed-off-by: Stefan Reinauer Acked-by: Peter Stuge git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3304 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- util/inteltool/inteltool.8 | 66 ++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 66 insertions(+) create mode 100644 util/inteltool/inteltool.8 (limited to 'util/inteltool/inteltool.8') diff --git a/util/inteltool/inteltool.8 b/util/inteltool/inteltool.8 new file mode 100644 index 0000000000..daef6c2920 --- /dev/null +++ b/util/inteltool/inteltool.8 @@ -0,0 +1,66 @@ +.TH INTELTOOL 8 "May 12, 2008" +.SH NAME +inteltool \- a tool for dumping Intel(R) CPU / chipset configuration parameters +.SH SYNOPSIS +.B inteltool \fR[\fB\-vh?grpmedPM\fR] +.SH DESCRIPTION +.B inteltool +is a handy little tool for dumping the configuration space of Intel(R) +CPUs, northbridges and southbridges. + +This tool has been developed for the coreboot project (see +.B http://www.coreboot.org/ +for details on coreboot). +.SH OPTIONS +.TP +.B "\-h, \-\-help" +Show a help text and exit. +.TP +.B "\-v, \-\-version" +Show version information and exit. +.TP +.B "\-a, \-\-all" +Dump all known I/O Controller Hub (ICH) southbridge, Intel(R) northbridge and Intel(R) Core CPU MSRs. +.TP +.B "\-g, \-\-gpio" +Dump I/O Controller Hub (ICH) southbridge GPIO registers +.TP +.B "\-r, \-\-rcba" +Dump I/O Controller Hub (ICH) southbridge RCBA registers +.TP +.B "\-p, \-\-pmbase" +Dump I/O Controller Hub (ICH) southbridge pmbase registers +.TP +.B "\-m, \-\-mchbar" +Dump Intel(R) northbridge MCHBAR registers +.TP +.B "\-e, \-\-epbar" +Dump Intel(R) northbridge EPBAR registers +.TP +.B "\-d, \-\-dmibar" +Dump Intel(R) northbridge DMIBAR registers +.TP +.B "\-P, \-\-pciexbar" +Dump Intel(R) northbridge PCIEXBAR registers +.TP +.B "\-M, \-\-msrs" +Dump Intel(R) CPU MSRs +.SH BUGS +Please report any bugs at +.BR http://tracker.coreboot.org/trac/coreboot/newticket "," +or on the coreboot mailing list +.RB "(" http://coreboot.org/Mailinglist ")." +.SH LICENCE +.B inteltool +is covered by the GNU General Public License (GPL), version 2 or later. +.SH COPYRIGHT +(C) 2008 coresystems GmbH +.SH AUTHORS +Stefan Reinauer +.PP +This manual page was written by Stefan Reinauer . +It is licensed under the terms of the GNU GPL (version 2). + +Intel(R) is a registered trademark of Intel Corporation. Other product and/or company names mentioned herein may be trademarks or registered trademarks of their respective owners. + + -- cgit v1.2.3