From 82ec61e9d7a39a11c9b8ed68eb90bd29905439bc Mon Sep 17 00:00:00 2001 From: Maxim Polyakov Date: Sun, 26 Apr 2020 22:12:01 +0300 Subject: util/intelp2m: Add Intel Pad to Macro utility This patch adds a new utility for converting a pad configuration from the inteltool dump to the PAD_CFG_*() macros [1] for coreboot and GPIO config data structures for FSP/sdk2-platforms/slimbootloader [2,3]. Mirror: https://github.com/maxpoliak/pch-pads-parser.git [1] src/soc/intel/common/block/include/intelblocks/gpio_defs.h [2] https://slimbootloader.github.io/tools/index.html#gpio-tool [3] 3rdparty/fsp/CometLakeFspBinPkg/CometLake1/Include/GpioSampleDef.h Change-Id: If3e3b523c4f63dc2f91e9ccd16934e3a1b6e21fa Signed-off-by: Maxim Polyakov Reviewed-on: https://review.coreboot.org/c/coreboot/+/35643 Reviewed-by: Andrey Petrov Reviewed-by: Angel Pons Tested-by: build bot (Jenkins) --- util/intelp2m/platforms/snr/macro.go | 278 ++++++++++++++++++++++++++++++++ util/intelp2m/platforms/snr/template.go | 37 +++++ 2 files changed, 315 insertions(+) create mode 100644 util/intelp2m/platforms/snr/macro.go create mode 100644 util/intelp2m/platforms/snr/template.go (limited to 'util/intelp2m/platforms/snr') diff --git a/util/intelp2m/platforms/snr/macro.go b/util/intelp2m/platforms/snr/macro.go new file mode 100644 index 0000000000..86cc7b727f --- /dev/null +++ b/util/intelp2m/platforms/snr/macro.go @@ -0,0 +1,278 @@ +package snr + +import "strings" +import "fmt" + +// Local packages +import "../common" +import "../../config" +import "../../fields" + +const ( + PAD_CFG_DW0_RO_FIELDS = (0x1 << 27) | (0x1 << 24) | (0x3 << 21) | (0xf << 16) | 0xfc + PAD_CFG_DW1_RO_FIELDS = 0xfdffc3ff +) + +const ( + PAD_CFG_DW0 = common.PAD_CFG_DW0 + PAD_CFG_DW1 = common.PAD_CFG_DW1 + MAX_DW_NUM = common.MAX_DW_NUM +) + +type PlatformSpecific struct {} + +// RemmapRstSrc - remmap Pad Reset Source Config +func (PlatformSpecific) RemmapRstSrc() { + macro := common.GetMacro() + if config.TemplateGet() != config.TempInteltool { + // Use reset source remapping only if the input file is inteltool.log dump + return + } + if strings.Contains(macro.PadIdGet(), "GPD") { + // See reset map for the Sunrise GPD Group in the Community 2: + // https://github.com/coreboot/coreboot/blob/master/src/soc/intel/skylake/gpio.c#L15 + // remmap is not required because it is the same as common. + return + } + + dw0 := macro.Register(PAD_CFG_DW0) + var remapping = map[uint8]uint32{ + 0: common.RST_RSMRST << common.PadRstCfgShift, + 1: common.RST_DEEP << common.PadRstCfgShift, + 2: common.RST_PLTRST << common.PadRstCfgShift, + } + resetsrc, valid := remapping[dw0.GetResetConfig()] + if valid { + // dw0.SetResetConfig(resetsrc) + ResetConfigFieldVal := (dw0.ValueGet() & 0x3fffffff) | remapping[dw0.GetResetConfig()] + dw0.ValueSet(ResetConfigFieldVal) + } else { + fmt.Println("Invalid Pad Reset Config [ 0x", resetsrc ," ] for ", macro.PadIdGet()) + } + dw0.CntrMaskFieldsClear(common.PadRstCfgMask) +} + +// Adds The Pad Termination (TERM) parameter from PAD_CFG_DW1 to the macro +// as a new argument +func (PlatformSpecific) Pull() { + macro := common.GetMacro() + dw1 := macro.Register(PAD_CFG_DW1) + var pull = map[uint8]string{ + 0x0: "NONE", + 0x2: "5K_PD", + 0x4: "20K_PD", + 0x9: "1K_PU", + 0xa: "5K_PU", + 0xb: "2K_PU", + 0xc: "20K_PU", + 0xd: "667_PU", + 0xf: "NATIVE", + } + str, valid := pull[dw1.GetTermination()] + if !valid { + str = "INVALID" + fmt.Println("Error", + macro.PadIdGet(), + " invalid TERM value = ", + int(dw1.GetTermination())) + } + macro.Separator().Add(str) +} + +// Generate macro to cause peripheral IRQ when configured in GPIO input mode +func ioApicRoute() bool { + macro := common.GetMacro() + dw0 := macro.Register(PAD_CFG_DW0) + if dw0.GetGPIOInputRouteIOxAPIC() == 0 { + return false + } + + macro.Add("_APIC") + if dw0.GetRXLevelEdgeConfiguration() == common.TRIG_LEVEL { + if dw0.GetRxInvert() != 0 { + // PAD_CFG_GPI_APIC_INVERT(pad, pull, rst) + macro.Add("_INVERT") + } + // PAD_CFG_GPI_APIC(pad, pull, rst) + macro.Add("(").Id().Pull().Rstsrc().Add("),") + return true + } + + // e.g. PAD_CFG_GPI_APIC_IOS(pad, pull, rst, trig, inv, iosstate, iosterm) + macro.Add("_IOS(").Id().Pull().Rstsrc().Trig().Invert().Add(", TxLASTRxE, SAME),") + return true +} + +// Generate macro to cause NMI when configured in GPIO input mode +func nmiRoute() bool { + macro := common.GetMacro() + if macro.Register(PAD_CFG_DW0).GetGPIOInputRouteNMI() == 0 { + return false + } + // PAD_CFG_GPI_NMI(GPIO_24, UP_20K, DEEP, LEVEL, INVERT), + macro.Add("_NMI").Add("(").Id().Pull().Rstsrc().Trig().Invert().Add("),") + return true +} + +// Generate macro to cause SCI when configured in GPIO input mode +func sciRoute() bool { + macro := common.GetMacro() + dw0 := macro.Register(PAD_CFG_DW0) + if dw0.GetGPIOInputRouteSCI() == 0 { + return false + } + // e.g. PAD_CFG_GPI_SCI(GPP_B18, UP_20K, PLTRST, LEVEL, INVERT), + if (dw0.GetRXLevelEdgeConfiguration() & common.TRIG_EDGE_SINGLE) != 0 { + // e.g. PAD_CFG_GPI_ACPI_SCI(GPP_G2, NONE, DEEP, YES), + // #define PAD_CFG_GPI_ACPI_SCI(pad, pull, rst, inv) \ + // PAD_CFG_GPI_SCI(pad, pull, rst, EDGE_SINGLE, inv) + macro.Add("_ACPI") + } + macro.Add("_SCI").Add("(").Id().Pull().Rstsrc() + if (dw0.GetRXLevelEdgeConfiguration() & common.TRIG_EDGE_SINGLE) == 0 { + macro.Trig() + } + macro.Invert().Add("),") + return true +} + +// Generate macro to cause SMI when configured in GPIO input mode +func smiRoute() bool { + macro := common.GetMacro() + dw0 := macro.Register(PAD_CFG_DW0) + if dw0.GetGPIOInputRouteSMI() == 0 { + return false + } + if (dw0.GetRXLevelEdgeConfiguration() & common.TRIG_EDGE_SINGLE) != 0 { + // e.g. PAD_CFG_GPI_ACPI_SMI(GPP_I3, NONE, DEEP, YES), + macro.Add("_ACPI") + } + macro.Add("_SMI").Add("(").Id().Pull().Rstsrc() + if (dw0.GetRXLevelEdgeConfiguration() & common.TRIG_EDGE_SINGLE) == 0 { + // e.g. PAD_CFG_GPI_SMI(GPP_E7, NONE, DEEP, LEVEL, NONE), + macro.Trig() + } + macro.Invert().Add("),") + return true +} + +// Adds PAD_CFG_GPI macro with arguments +func (PlatformSpecific) GpiMacroAdd() { + macro := common.GetMacro() + var ids []string + macro.Set("PAD_CFG_GPI") + for routeid, isRoute := range map[string]func() (bool) { + "IOAPIC": ioApicRoute, + "SCI": sciRoute, + "SMI": smiRoute, + "NMI": nmiRoute, + } { + if isRoute() { + ids = append(ids, routeid) + } + } + + switch argc := len(ids); argc { + case 0: + // e.g. PAD_CFG_GPI_TRIG_OWN(pad, pull, rst, trig, own) + macro.Add("_TRIG_OWN").Add("(").Id().Pull().Rstsrc().Trig().Own().Add("),") + case 1: + // GPI with IRQ route + if config.AreFieldsIgnored() { + // Set Host Software Ownership to ACPI mode + macro.SetPadOwnership(common.PAD_OWN_ACPI) + } + + case 2: + // PAD_CFG_GPI_DUAL_ROUTE(pad, pull, rst, trig, inv, route1, route2) + macro.Set("PAD_CFG_GPI_DUAL_ROUTE(").Id().Pull().Rstsrc().Trig().Invert() + macro.Add(", " + ids[0] + ", " + ids[1] + "),") + if config.AreFieldsIgnored() { + // Set Host Software Ownership to ACPI mode + macro.SetPadOwnership(common.PAD_OWN_ACPI) + } + default: + // Clear the control mask so that the check fails and "Advanced" macro is + // generated + macro.Register(PAD_CFG_DW0).CntrMaskFieldsClear(common.AllFields) + } +} + +// Adds PAD_CFG_GPO macro with arguments +func (PlatformSpecific) GpoMacroAdd() { + macro := common.GetMacro() + dw0 := macro.Register(PAD_CFG_DW0) + term := macro.Register(PAD_CFG_DW1).GetTermination() + + // #define PAD_CFG_GPO(pad, val, rst) \ + // _PAD_CFG_STRUCT(pad, \ + // PAD_FUNC(GPIO) | PAD_RESET(rst) | \ + // PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | !!val, \ + // PAD_PULL(NONE) | PAD_IOSSTATE(TxLASTRxE)) + if dw0.GetRXLevelEdgeConfiguration() != common.TRIG_OFF { + dw0.CntrMaskFieldsClear(common.RxLevelEdgeConfigurationMask) + } + macro.Set("PAD_CFG") + if macro.IsOwnershipDriver() { + // PAD_CFG_GPO_GPIO_DRIVER(pad, val, rst, pull) + macro.Add("_GPO_GPIO_DRIVER").Add("(").Id().Val().Rstsrc().Pull().Add("),") + return + } + if term != 0 { + // e.g. PAD_CFG_TERM_GPO(GPP_B23, 1, DN_20K, DEEP), + macro.Add("_TERM") + } + macro.Add("_GPO").Add("(").Id().Val() + if term != 0 { + macro.Pull() + } + macro.Rstsrc().Add("),") +} + +// Adds PAD_CFG_NF macro with arguments +func (PlatformSpecific) NativeFunctionMacroAdd() { + macro := common.GetMacro() + // e.g. PAD_CFG_NF(GPP_D23, NONE, DEEP, NF1) + macro.Set("PAD_CFG_NF") + if macro.Register(PAD_CFG_DW1).GetPadTol() != 0 { + macro.Add("_1V8") + } + macro.Add("(").Id().Pull().Rstsrc().Padfn().Add("),") +} + +// Adds PAD_NC macro +func (PlatformSpecific) NoConnMacroAdd() { + macro := common.GetMacro() + // #define PAD_NC(pad, pull) + // _PAD_CFG_STRUCT(pad, + // PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), + // PAD_PULL(pull) | PAD_IOSSTATE(TxDRxE)), + dw0 := macro.Register(PAD_CFG_DW0) + + // Some fields of the configuration registers are hidden inside the macros, + // we should check them to update the corresponding bits in the control mask. + if dw0.GetRXLevelEdgeConfiguration() != common.TRIG_OFF { + dw0.CntrMaskFieldsClear(common.RxLevelEdgeConfigurationMask) + } + if dw0.GetResetConfig() != 1 { // 1 = RST_DEEP + dw0.CntrMaskFieldsClear(common.PadRstCfgMask) + } + + macro.Set("PAD_NC").Add("(").Id().Pull().Add("),") +} + +// GenMacro - generate pad macro +// dw0 : DW0 config register value +// dw1 : DW1 config register value +// return: string of macro +// error +func (PlatformSpecific) GenMacro(id string, dw0 uint32, dw1 uint32, ownership uint8) string { + macro := common.GetInstanceMacro(PlatformSpecific{}, fields.InterfaceGet()) + macro.Clear() + macro.Register(PAD_CFG_DW0).CntrMaskFieldsClear(common.AllFields) + macro.Register(PAD_CFG_DW0).CntrMaskFieldsClear(common.AllFields) + macro.PadIdSet(id).SetPadOwnership(ownership) + macro.Register(PAD_CFG_DW0).ValueSet(dw0).ReadOnlyFieldsSet(PAD_CFG_DW0_RO_FIELDS) + macro.Register(PAD_CFG_DW1).ValueSet(dw1).ReadOnlyFieldsSet(PAD_CFG_DW1_RO_FIELDS) + return macro.Generate() +} diff --git a/util/intelp2m/platforms/snr/template.go b/util/intelp2m/platforms/snr/template.go new file mode 100644 index 0000000000..c6c39b198e --- /dev/null +++ b/util/intelp2m/platforms/snr/template.go @@ -0,0 +1,37 @@ +package snr + +import "strings" + +// GroupNameExtract - This function extracts the group ID, if it exists in a row +// line : string from the configuration file +// return +// bool : true if the string contains a group identifier +// string : group identifier +func (PlatformSpecific) GroupNameExtract(line string) (bool, string) { + for _, groupKeyword := range []string{ + "GPP_A", "GPP_B", "GPP_F", + "GPP_C", "GPP_D", "GPP_E", + "GPD", "GPP_I", + "GPP_J", "GPP_K", + "GPP_G", "GPP_H", "GPP_L", + } { + if strings.Contains(line, groupKeyword) { + return true, groupKeyword + } + } + return false, "" +} + +// KeywordCheck - This function is used to filter parsed lines of the configuration file and +// returns true if the keyword is contained in the line. +// line : string from the configuration file +func (PlatformSpecific) KeywordCheck(line string) bool { + for _, keyword := range []string{ + "GPP_", "GPD", + } { + if strings.Contains(line, keyword) { + return true + } + } + return false +} -- cgit v1.2.3