From d593bf7dfe5badb989ad32d920a556eabffaa2ea Mon Sep 17 00:00:00 2001 From: Benjamin Doron Date: Wed, 9 Jun 2021 20:08:10 +0000 Subject: util/intelp2m/fsp: Fix wrong register decoding for direction and interrupt MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Using the wrong registers to build the fields led to incorrect GPIO direction and interrupt trigger values. Change the calls to fix the tables. Change-Id: Icbeeb1fec6a863d0f86659c21924e15ae6765d47 Signed-off-by: Benjamin Doron Reviewed-on: https://review.coreboot.org/c/coreboot/+/54973 Reviewed-by: Maxim Polyakov Reviewed-by: Michael Niewöhner Tested-by: build bot (Jenkins) --- util/intelp2m/fields/fsp/fsp.go | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'util/intelp2m/fields') diff --git a/util/intelp2m/fields/fsp/fsp.go b/util/intelp2m/fields/fsp/fsp.go index 360333afd5..be3cde9dab 100644 --- a/util/intelp2m/fields/fsp/fsp.go +++ b/util/intelp2m/fields/fsp/fsp.go @@ -74,7 +74,7 @@ func (FieldMacros) DecodeDW0() { 1 << 4 | 0: "GpioDirInInvOut", 1 << 4 | 1: "GpioDirInInv", }, - value : dw0.GetRxInvert() << 4 | dw0.GetRXLevelEdgeConfiguration(), + value : dw0.GetRxInvert() << 4 | dw0.GetGPIORxTxDisableStatus(), }, &field { @@ -116,7 +116,7 @@ func (FieldMacros) DecodeDW0() { 2: "GpioIntLvlEdgDis", 3: "GpioIntBothEdge", }, - value : dw0.GetResetConfig(), + value : dw0.GetRXLevelEdgeConfiguration(), }, &field { -- cgit v1.2.3