From 31b7ee42016f7b54c24f30c271b4b93df16bfa10 Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Mon, 17 Feb 2020 14:04:28 +0100 Subject: treewide: Replace uses of "Nehalem" The code in coreboot is actually for the Arrandale processors, which are a MCM (Multi-Chip Module) with two different dies: - Hillel: 32nm Westmere dual-core CPU - Ironlake: 45nm northbridge with integrated graphics This has nothing to do with the older, single-die Nehalem processors. Therefore, replace the references to Nehalem with the correct names. Change-Id: I8c10a2618c519d2411211b9b8f66d24f0018f908 Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/38942 Reviewed-by: Felix Held Tested-by: build bot (Jenkins) --- util/docker/coreboot.org-status/board-status.html/tohtml.sh | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'util/docker/coreboot.org-status/board-status.html') diff --git a/util/docker/coreboot.org-status/board-status.html/tohtml.sh b/util/docker/coreboot.org-status/board-status.html/tohtml.sh index fa89ae962b..2606af4065 100755 --- a/util/docker/coreboot.org-status/board-status.html/tohtml.sh +++ b/util/docker/coreboot.org-status/board-status.html/tohtml.sh @@ -471,7 +471,7 @@ EOF "") case $northbridge in INTEL_IRONLAKE) - cpu_nice="Intel® 1st Gen (Nehalem) Core i3/i5/i7" + cpu_nice="Intel® 1st Gen (Westmere) Core i3/i5/i7" socket_nice="?";; RDC_R8610) cpu_nice="RDC 8610" -- cgit v1.2.3