From 7844912f3788a3ce116fa20d388ee974d7209cc5 Mon Sep 17 00:00:00 2001 From: Stefan Reinauer Date: Fri, 15 Apr 2016 10:12:57 -0700 Subject: crossgcc: Fix out of bounds array access for nds32le Patch from Segher Boessenkool Change-Id: Ia91e0d6e50399da38afd8cdc0b92c82e4efa0a08 Signed-off-by: Stefan Reinauer Reviewed-on: https://review.coreboot.org/14380 Tested-by: build bot (Jenkins) Reviewed-by: Idwer Vollering Reviewed-by: Martin Roth --- util/crossgcc/patches/gcc-5.2.0_nds32.patch | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) create mode 100644 util/crossgcc/patches/gcc-5.2.0_nds32.patch (limited to 'util/crossgcc') diff --git a/util/crossgcc/patches/gcc-5.2.0_nds32.patch b/util/crossgcc/patches/gcc-5.2.0_nds32.patch new file mode 100644 index 0000000000..3b772fa7d3 --- /dev/null +++ b/util/crossgcc/patches/gcc-5.2.0_nds32.patch @@ -0,0 +1,17 @@ +diff -urN gcc-5.2.0.orig/gcc/config/nds32/nds32.md gcc-5.2.0/gcc/config/nds32/nds32.md +--- gcc-5.2.0.orig/gcc/config/nds32/nds32.md 2015-01-15 22:45:09.000000000 -0800 ++++ gcc-5.2.0/gcc/config/nds32/nds32.md 2016-04-14 22:09:09.000000000 -0700 +@@ -2289,11 +2289,11 @@ + emit_jump_insn (gen_cbranchsi4 (test, operands[0], operands[2], + operands[4])); + +- operands[5] = gen_reg_rtx (SImode); ++ rtx tmp = gen_reg_rtx (SImode); + /* Step C, D, E, and F, using another temporary register operands[5]. */ + emit_jump_insn (gen_casesi_internal (operands[0], + operands[3], +- operands[5])); ++ tmp)); + DONE; + }) + -- cgit v1.2.3