From f944e619dd2739d268fc7eaea85d8acdf91bbfb8 Mon Sep 17 00:00:00 2001 From: Yilin Yang Date: Wed, 16 Sep 2020 14:20:52 +0800 Subject: util/mtkheader: Port gen-bl-img.py to python3 BUG=chromium:1023662 TEST=1. Use python2 script 2. Run `emerge-asurada coreboot` twice, so we get bootblock.bin.1 and bootblock.bin.2 3. Run `xxd` on these two bootblock so we get bootblock.bin.1.hex and bootblock.bin.2.hex 4. `diff bootblock.bin.1.hex bootblock.bin.2.hex` and record the difference. (at least, the time info changes) 5. Migrate to python3 6. Similar steps, we get bootblock.bin.py3.hex 7. `diff bootblock.bin.1.hex bootblock.bin.py3.hex`, the difference is similar. Signed-off-by: Yilin Yang Change-Id: I788e7c9b09257142728a0f76df8c2ccc72bf6b3b Reviewed-on: https://review.coreboot.org/c/coreboot/+/45440 Tested-by: build bot (Jenkins) Reviewed-by: Hung-Te Lin Reviewed-by: Yu-Ping Wu --- util/README.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'util/README.md') diff --git a/util/README.md b/util/README.md index 8b05f6f729..5ed4e758a3 100644 --- a/util/README.md +++ b/util/README.md @@ -65,7 +65,7 @@ embedded controller and insert them to the firmware image. `C` partial deblobbing of Intel ME/TXE firmware images `Python` * __mma__ - Memory Margin Analysis automation tests `Bash` * __msrtool__ - Dumps chipset-specific MSR registers. `C` -* __mtkheader__ - Generate MediaTek bootload header. `Python2` +* __mtkheader__ - Generate MediaTek bootload header. `Python3` * __nvidia__ - nvidia blob parsers * __nvramtool__ - Reads and writes coreboot parameters and displaying information from the coreboot table in CMOS/NVRAM. `C` -- cgit v1.2.3