From be7f79867e4d989fc9cb7fb9e8b0b8ec55956875 Mon Sep 17 00:00:00 2001 From: Stefan Reinauer Date: Fri, 13 Mar 2009 15:42:27 +0000 Subject: This, ladies and gentlement, is commit #4000. Use the (almost) same strict CFLAGS in v2 that we use on v3. And fix a few include files and missing prototypes. Also, fix up the Config-abuild.lb files to properly work for cross compiling. Signed-off-by: Stefan Reinauer Acked-by: Stefan Reinauer git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4000 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- targets/via/epia-m/Config-abuild.lb | 28 +++++----------------------- 1 file changed, 5 insertions(+), 23 deletions(-) (limited to 'targets/via') diff --git a/targets/via/epia-m/Config-abuild.lb b/targets/via/epia-m/Config-abuild.lb index 7df740905c..dd3336782b 100644 --- a/targets/via/epia-m/Config-abuild.lb +++ b/targets/via/epia-m/Config-abuild.lb @@ -1,32 +1,14 @@ -# abuild config file for EPIA-M +target VENDOR_MAINBOARD +mainboard VENDOR/MAINBOARD -target via_epia-m -mainboard via/epia-m - -option MAXIMUM_CONSOLE_LOGLEVEL=8 -option DEFAULT_CONSOLE_LOGLEVEL=8 -option CONFIG_CONSOLE_SERIAL8250=1 +option CC="CROSSCC" +option CROSS_COMPILE="CROSS_PREFIX" +option HOSTCC="CROSS_HOSTCC" __COMPRESSION__ option ROM_SIZE=256*1024 -option HAVE_OPTION_TABLE=1 -option CONFIG_ROM_PAYLOAD=1 -option HAVE_FALLBACK_BOOT=1 - -### -### Compute the location and size of where this firmware image -### (coreboot plus bootloader) will live in the boot rom chip. -### -option FALLBACK_SIZE=131072 - -## Coreboot C code runs at this location in RAM -option _RAMBASE=0x00004000 - -# -# Via EPIA M -# romimage "normal" option USE_FALLBACK_IMAGE=0 option ROM_IMAGE_SIZE=64*1024 -- cgit v1.2.3