From 0867062412dd4bfe5a556e5f3fd85ba5b682d79b Mon Sep 17 00:00:00 2001 From: Stefan Reinauer Date: Tue, 30 Jun 2009 15:17:49 +0000 Subject: This patch unifies the use of config options in v2 to all start with CONFIG_ It's basically done with the following script and some manual fixup: VARS=`grep ^define src/config/Options.lb | cut -f2 -d\ | grep -v ^CONFIG | grep -v ^COREBOOT |grep -v ^CC` for VAR in $VARS; do find . -name .svn -prune -o -type f -exec perl -pi -e "s/(^|[^0-9a-zA-Z_]+)$VAR($|[^0-9a-zA-Z_]+)/\1CONFIG_$VAR\2/g" {} \; done Signed-off-by: Stefan Reinauer Acked-by: Ronald G. Minnich git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4381 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- targets/via/epia-cn/Config-abuild.lb | 12 +++++------ targets/via/epia-cn/Config.lb | 10 ++++----- targets/via/epia-m/Config-abuild.lb | 16 +++++++-------- targets/via/epia-m/Config.512kflash.lb | 24 +++++++++++----------- targets/via/epia-m/Config.etherboot.lb | 24 +++++++++++----------- targets/via/epia-m/Config.filo.lb | 24 +++++++++++----------- targets/via/epia-m/Config.lb | 28 +++++++++++++------------- targets/via/epia-m/Config.vga.filo | 28 +++++++++++++------------- targets/via/epia-m700/Config.lb | 2 +- targets/via/epia/Config.512kflash.lb | 12 +++++------ targets/via/epia/Config.512kflash.linuxtiny.lb | 14 ++++++------- targets/via/epia/Config.filo.lb | 10 ++++----- targets/via/epia/Config.ituner.filo.lb | 14 ++++++------- targets/via/epia/Config.lb | 14 ++++++------- targets/via/pc2500e/Config-abuild.lb | 12 +++++------ targets/via/pc2500e/Config.lb | 2 +- targets/via/vt8454c/Config-abuild.lb | 10 ++++----- targets/via/vt8454c/Config.lb | 12 +++++------ 18 files changed, 134 insertions(+), 134 deletions(-) (limited to 'targets/via') diff --git a/targets/via/epia-cn/Config-abuild.lb b/targets/via/epia-cn/Config-abuild.lb index d364cb7cbd..2a65acae0d 100644 --- a/targets/via/epia-cn/Config-abuild.lb +++ b/targets/via/epia-cn/Config-abuild.lb @@ -4,18 +4,18 @@ target VENDOR_MAINBOARD mainboard VENDOR/MAINBOARD option CC="CROSSCC" -option CROSS_COMPILE="CROSS_PREFIX" -option HOSTCC="CROSS_HOSTCC" +option CONFIG_CROSS_COMPILE="CROSS_PREFIX" +option CONFIG_HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ -option ROM_SIZE=512*1024 +option CONFIG_ROM_SIZE=512*1024 romimage "fallback" - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x20000 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=0x20000 option COREBOOT_EXTRA_VERSION=".0-fallback" payload __PAYLOAD__ end -buildrom ./coreboot.rom ROM_SIZE "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "fallback" diff --git a/targets/via/epia-cn/Config.lb b/targets/via/epia-cn/Config.lb index c6d82e5b5d..3d51302956 100644 --- a/targets/via/epia-cn/Config.lb +++ b/targets/via/epia-cn/Config.lb @@ -22,22 +22,22 @@ target via_epia_cn mainboard via/epia-cn -option MAXIMUM_CONSOLE_LOGLEVEL=8 -option DEFAULT_CONSOLE_LOGLEVEL=8 +option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8 +option CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8 option CONFIG_CONSOLE_SERIAL8250=1 # coreboot C code runs at this location in RAM -option _RAMBASE=0x00004000 +option CONFIG_RAMBASE=0x00004000 # # Generate the final ROM like this: # cat vgabios bochsbios coreboot.rom > coreboot.rom.final # -option ROM_SIZE = (512 * 1024) - (64 * 1024) - (64 * 1024) +option CONFIG_ROM_SIZE = (512 * 1024) - (64 * 1024) - (64 * 1024) romimage "image" option COREBOOT_EXTRA_VERSION = "-epiacn" payload ../payload.elf end -buildrom ./coreboot.rom ROM_SIZE "image" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "image" diff --git a/targets/via/epia-m/Config-abuild.lb b/targets/via/epia-m/Config-abuild.lb index 52c1711bd2..85066ba0d7 100644 --- a/targets/via/epia-m/Config-abuild.lb +++ b/targets/via/epia-m/Config-abuild.lb @@ -2,26 +2,26 @@ target VENDOR_MAINBOARD mainboard VENDOR/MAINBOARD option CC="CROSSCC" -option CROSS_COMPILE="CROSS_PREFIX" -option HOSTCC="CROSS_HOSTCC" +option CONFIG_CROSS_COMPILE="CROSS_PREFIX" +option CONFIG_HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ -option ROM_SIZE=256*1024 +option CONFIG_ROM_SIZE=256*1024 romimage "normal" - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=64*1024 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=64*1024 option COREBOOT_EXTRA_VERSION=".0-Normal" payload __PAYLOAD__ end romimage "fallback" - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=64*1024 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=64*1024 option COREBOOT_EXTRA_VERSION=".0-Fallback" payload __PAYLOAD__ end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/via/epia-m/Config.512kflash.lb b/targets/via/epia-m/Config.512kflash.lb index 88d13821ff..0cf7e1c593 100644 --- a/targets/via/epia-m/Config.512kflash.lb +++ b/targets/via/epia-m/Config.512kflash.lb @@ -5,25 +5,25 @@ target epia-m.512kflash mainboard via/epia-m -option MAXIMUM_CONSOLE_LOGLEVEL=8 -option DEFAULT_CONSOLE_LOGLEVEL=8 +option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8 +option CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8 option CONFIG_CONSOLE_SERIAL8250=1 -option ROM_SIZE=512*1024 +option CONFIG_ROM_SIZE=512*1024 -option HAVE_OPTION_TABLE=1 +option CONFIG_HAVE_OPTION_TABLE=1 option CONFIG_ROM_PAYLOAD=1 -option HAVE_FALLBACK_BOOT=1 +option CONFIG_HAVE_FALLBACK_BOOT=1 ### ### Compute the location and size of where this firmware image ### (coreboot plus bootloader) will live in the boot rom chip. ### -option FALLBACK_SIZE=131072 +option CONFIG_FALLBACK_SIZE=131072 ## Coreboot C code runs at this location in RAM -option _RAMBASE=0x00004000 +option CONFIG_RAMBASE=0x00004000 # ### @@ -35,8 +35,8 @@ option _RAMBASE=0x00004000 # Via EPIA M # romimage "normal" - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=0x10000 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=0x10000 option COREBOOT_EXTRA_VERSION=".0Normal" # payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf # payload ../../../../tg3--ide_disk.zelf @@ -44,12 +44,12 @@ romimage "normal" end romimage "fallback" - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x10000 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=0x10000 option COREBOOT_EXTRA_VERSION=".0Fallback" # payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf # payload ../../../../tg3--ide_disk.zelf payload ../../../../../lnxieepro100.ebi end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/via/epia-m/Config.etherboot.lb b/targets/via/epia-m/Config.etherboot.lb index 6e59424be8..0ceaf171ec 100644 --- a/targets/via/epia-m/Config.etherboot.lb +++ b/targets/via/epia-m/Config.etherboot.lb @@ -5,24 +5,24 @@ target epia-m mainboard via/epia-m -option MAXIMUM_CONSOLE_LOGLEVEL=8 -option DEFAULT_CONSOLE_LOGLEVEL=8 +option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8 +option CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8 option CONFIG_CONSOLE_SERIAL8250=1 -option ROM_SIZE=256*1024 +option CONFIG_ROM_SIZE=256*1024 -option HAVE_OPTION_TABLE=1 +option CONFIG_HAVE_OPTION_TABLE=1 option CONFIG_ROM_PAYLOAD=1 -option HAVE_FALLBACK_BOOT=1 +option CONFIG_HAVE_FALLBACK_BOOT=1 ### ### Compute the location and size of where this firmware image ### (coreboot plus bootloader) will live in the boot rom chip. ### -option FALLBACK_SIZE=131072 +option CONFIG_FALLBACK_SIZE=131072 ## Coreboot C code runs at this location in RAM -option _RAMBASE=0x00004000 +option CONFIG_RAMBASE=0x00004000 # ### @@ -34,8 +34,8 @@ option _RAMBASE=0x00004000 # Via EPIA-M # romimage "normal" - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=0x10000 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=0x10000 option COREBOOT_EXTRA_VERSION=".0Normal" # payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf # payload ../../../../tg3--ide_disk.zelf @@ -43,12 +43,12 @@ romimage "normal" end romimage "fallback" - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x10000 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=0x10000 option COREBOOT_EXTRA_VERSION=".0Fallback" # payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf # payload ../../../../tg3--ide_disk.zelf payload ../../../../../lnxieepro100.ebi end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/via/epia-m/Config.filo.lb b/targets/via/epia-m/Config.filo.lb index bb5bc62a0e..02313ff15a 100644 --- a/targets/via/epia-m/Config.filo.lb +++ b/targets/via/epia-m/Config.filo.lb @@ -5,24 +5,24 @@ target epia-m mainboard via/epia-m -option MAXIMUM_CONSOLE_LOGLEVEL=8 -option DEFAULT_CONSOLE_LOGLEVEL=8 +option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8 +option CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8 option CONFIG_CONSOLE_SERIAL8250=1 -option ROM_SIZE=256*1024 +option CONFIG_ROM_SIZE=256*1024 -option HAVE_OPTION_TABLE=1 +option CONFIG_HAVE_OPTION_TABLE=1 option CONFIG_ROM_PAYLOAD=1 -option HAVE_FALLBACK_BOOT=1 +option CONFIG_HAVE_FALLBACK_BOOT=1 ### ### Compute the location and size of where this firmware image ### (coreboot plus bootloader) will live in the boot rom chip. ### -option FALLBACK_SIZE=131072 +option CONFIG_FALLBACK_SIZE=131072 ## Coreboot C code runs at this location in RAM -option _RAMBASE=0x00004000 +option CONFIG_RAMBASE=0x00004000 # ### @@ -34,8 +34,8 @@ option _RAMBASE=0x00004000 # EPIA-M # romimage "normal" - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=0x10000 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=0x10000 option COREBOOT_EXTRA_VERSION=".0Normal" # payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf # payload ../../../../tg3--ide_disk.zelf @@ -44,8 +44,8 @@ romimage "normal" end romimage "fallback" - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x10000 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=0x10000 option COREBOOT_EXTRA_VERSION=".0Fallback" # payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf # payload ../../../../tg3--ide_disk.zelf @@ -53,4 +53,4 @@ romimage "fallback" payload ../../../../../../filo.elf end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/via/epia-m/Config.lb b/targets/via/epia-m/Config.lb index 19f26d26cb..2f9d6e1d3d 100644 --- a/targets/via/epia-m/Config.lb +++ b/targets/via/epia-m/Config.lb @@ -3,16 +3,16 @@ target via_epia-m mainboard via/epia-m -option MAXIMUM_CONSOLE_LOGLEVEL=8 -option DEFAULT_CONSOLE_LOGLEVEL=8 +option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8 +option CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8 option CONFIG_CONSOLE_SERIAL8250=1 -option ROM_SIZE=256*1024 +option CONFIG_ROM_SIZE=256*1024 -option HAVE_OPTION_TABLE=1 +option CONFIG_HAVE_OPTION_TABLE=1 option CONFIG_ROM_PAYLOAD=1 -option HAVE_FALLBACK_BOOT=1 +option CONFIG_HAVE_FALLBACK_BOOT=1 #option CONFIG_COMPRESSED_PAYLOAD_NRV2B=1 option CONFIG_COMPRESSED_PAYLOAD_NRV2B=0 @@ -21,28 +21,28 @@ option CONFIG_COMPRESSED_PAYLOAD_NRV2B=0 ### Compute the location and size of where this firmware image ### (coreboot plus bootloader) will live in the boot rom chip. ### -option FALLBACK_SIZE=131072 +option CONFIG_FALLBACK_SIZE=131072 ## Coreboot C code runs at this location in RAM -option _RAMBASE=0x00004000 +option CONFIG_RAMBASE=0x00004000 # # Via EPIA M # romimage "normal" - option USE_FALLBACK_IMAGE=0 -#option ROM_IMAGE_SIZE=128*1024 - option ROM_IMAGE_SIZE=64*1024 + option CONFIG_USE_FALLBACK_IMAGE=0 +#option CONFIG_ROM_IMAGE_SIZE=128*1024 + option CONFIG_ROM_IMAGE_SIZE=64*1024 option COREBOOT_EXTRA_VERSION=".0-Normal" payload $(HOME)/svn/payload.elf end romimage "fallback" - option USE_FALLBACK_IMAGE=1 - #option ROM_IMAGE_SIZE=128*1024 - option ROM_IMAGE_SIZE=60*1024 + option CONFIG_USE_FALLBACK_IMAGE=1 + #option CONFIG_ROM_IMAGE_SIZE=128*1024 + option CONFIG_ROM_IMAGE_SIZE=60*1024 option COREBOOT_EXTRA_VERSION=".0-Fallback" payload $(HOME)/svn/payload.elf end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/via/epia-m/Config.vga.filo b/targets/via/epia-m/Config.vga.filo index c1f88b0bd9..86b4fb29b9 100644 --- a/targets/via/epia-m/Config.vga.filo +++ b/targets/via/epia-m/Config.vga.filo @@ -5,23 +5,23 @@ target epia-m mainboard via/epia-m -option MAXIMUM_CONSOLE_LOGLEVEL=8 -option DEFAULT_CONSOLE_LOGLEVEL=8 +option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8 +option CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8 option CONFIG_CONSOLE_SERIAL8250=1 -option ROM_SIZE=256*1024 -option HAVE_OPTION_TABLE=1 +option CONFIG_ROM_SIZE=256*1024 +option CONFIG_HAVE_OPTION_TABLE=1 option CONFIG_ROM_PAYLOAD=1 -option HAVE_FALLBACK_BOOT=1 +option CONFIG_HAVE_FALLBACK_BOOT=1 ### ### Compute the location and size of where this firmware image ### (coreboot plus bootloader) will live in the boot rom chip. ### -option FALLBACK_SIZE=0x18000 +option CONFIG_FALLBACK_SIZE=0x18000 ## Coreboot C code runs at this location in RAM -option _RAMBASE=0x00004000 +option CONFIG_RAMBASE=0x00004000 ### ### Compute the start location and size size of @@ -32,19 +32,19 @@ option _RAMBASE=0x00004000 # EPIA-M # romimage "normal" - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=0xc000 - option ROM_SECTION_OFFSET=0x10000 - option ROM_SECTION_SIZE=0x18000 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=0xc000 + option CONFIG_ROM_SECTION_OFFSET=0x10000 + option CONFIG_ROM_SECTION_SIZE=0x18000 option COREBOOT_EXTRA_VERSION=".0-Normal" payload $(HOME)/svn/filo.elf end romimage "fallback" - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0xc000 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=0xc000 option COREBOOT_EXTRA_VERSION=".0-Fallback" payload $(HOME)/svn/filo.elf end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/via/epia-m700/Config.lb b/targets/via/epia-m700/Config.lb index 4cb630882a..ecedd02070 100644 --- a/targets/via/epia-m700/Config.lb +++ b/targets/via/epia-m700/Config.lb @@ -26,4 +26,4 @@ romimage "image" payload ../payload.elf end -buildrom ./coreboot.rom ROM_SIZE "image" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "image" diff --git a/targets/via/epia/Config.512kflash.lb b/targets/via/epia/Config.512kflash.lb index ff2e4da303..c904b414d8 100644 --- a/targets/via/epia/Config.512kflash.lb +++ b/targets/via/epia/Config.512kflash.lb @@ -4,13 +4,13 @@ target epia.512kflash mainboard via/epia -option ROM_SIZE=512*1024 +option CONFIG_ROM_SIZE=512*1024 # # Via Epia romimage "normal" - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=0x10000 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=0x10000 option COREBOOT_EXTRA_VERSION=".0Normal" # payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf # payload ../../../../tg3--ide_disk.zelf @@ -18,12 +18,12 @@ romimage "normal" end romimage "fallback" - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x10000 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=0x10000 option COREBOOT_EXTRA_VERSION=".0Fallback" # payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf # payload ../../../../tg3--ide_disk.zelf payload ../../../../../lnxieepro100.ebi end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/via/epia/Config.512kflash.linuxtiny.lb b/targets/via/epia/Config.512kflash.linuxtiny.lb index 4a7702e4ce..b6b184b5d0 100644 --- a/targets/via/epia/Config.512kflash.linuxtiny.lb +++ b/targets/via/epia/Config.512kflash.linuxtiny.lb @@ -4,18 +4,18 @@ target epia.512kflash.linuxtiny mainboard via/epia -option ROM_SIZE=512*1024 -option FALLBACK_SIZE=ROM_SIZE -option MAXIMUM_CONSOLE_LOGLEVEL=9 -option DEFAULT_CONSOLE_LOGLEVEL=9 +option CONFIG_ROM_SIZE=512*1024 +option CONFIG_FALLBACK_SIZE=CONFIG_ROM_SIZE +option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=9 +option CONFIG_DEFAULT_CONSOLE_LOGLEVEL=9 romimage "fallback" - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=64*1024 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=64*1024 option COREBOOT_EXTRA_VERSION=".0Fallback" # payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf # payload ../../../../tg3--ide_disk.zelf payload /tmp/linux.elf end -buildrom ./coreboot.rom ROM_SIZE "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "fallback" diff --git a/targets/via/epia/Config.filo.lb b/targets/via/epia/Config.filo.lb index 0657cdb7e6..5107037135 100644 --- a/targets/via/epia/Config.filo.lb +++ b/targets/via/epia/Config.filo.lb @@ -7,8 +7,8 @@ mainboard via/epia # # Via Epia romimage "normal" - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=0x10000 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=0x10000 option COREBOOT_EXTRA_VERSION=".0Normal" # payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf # payload ../../../../tg3--ide_disk.zelf @@ -17,8 +17,8 @@ romimage "normal" end romimage "fallback" - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x10000 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=0x10000 option COREBOOT_EXTRA_VERSION=".0Fallback" # payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf # payload ../../../../tg3--ide_disk.zelf @@ -26,4 +26,4 @@ romimage "fallback" payload /tmp/filo.elf end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/via/epia/Config.ituner.filo.lb b/targets/via/epia/Config.ituner.filo.lb index 799dae3965..ddfec5e08c 100644 --- a/targets/via/epia/Config.ituner.filo.lb +++ b/targets/via/epia/Config.ituner.filo.lb @@ -4,13 +4,13 @@ target epia-ituner-filo mainboard via/epia -option MAXIMUM_CONSOLE_LOGLEVEL=9 -option DEFAULT_CONSOLE_LOGLEVEL=9 +option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=9 +option CONFIG_DEFAULT_CONSOLE_LOGLEVEL=9 # # Via Epia romimage "normal" - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=0x10000 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=0x10000 option COREBOOT_EXTRA_VERSION=".0Normal" # payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf # payload ../../../../tg3--ide_disk.zelf @@ -19,8 +19,8 @@ romimage "normal" end romimage "fallback" - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x10000 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=0x10000 option COREBOOT_EXTRA_VERSION=".0Fallback" # payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf # payload ../../../../tg3--ide_disk.zelf @@ -28,4 +28,4 @@ romimage "fallback" payload /tmp/filo.elf end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/via/epia/Config.lb b/targets/via/epia/Config.lb index f93088da90..72440e1538 100644 --- a/targets/via/epia/Config.lb +++ b/targets/via/epia/Config.lb @@ -8,13 +8,13 @@ target epia mainboard via/epia -option MAXIMUM_CONSOLE_LOGLEVEL=9 -option DEFAULT_CONSOLE_LOGLEVEL=9 +option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=9 +option CONFIG_DEFAULT_CONSOLE_LOGLEVEL=9 # # Via Epia romimage "normal" - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=0x10000 + option CONFIG_USE_FALLBACK_IMAGE=0 + option CONFIG_ROM_IMAGE_SIZE=0x10000 option COREBOOT_EXTRA_VERSION=".0Normal" # payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf # payload ../../../../tg3--ide_disk.zelf @@ -23,8 +23,8 @@ romimage "normal" end romimage "fallback" - option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x10000 + option CONFIG_USE_FALLBACK_IMAGE=1 + option CONFIG_ROM_IMAGE_SIZE=0x10000 option COREBOOT_EXTRA_VERSION=".0Fallback" # payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf # payload ../../../../tg3--ide_disk.zelf @@ -32,4 +32,4 @@ romimage "fallback" payload /etc/hosts end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" diff --git a/targets/via/pc2500e/Config-abuild.lb b/targets/via/pc2500e/Config-abuild.lb index c590daaa5e..b7bd85b8af 100644 --- a/targets/via/pc2500e/Config-abuild.lb +++ b/targets/via/pc2500e/Config-abuild.lb @@ -22,19 +22,19 @@ target VENDOR_MAINBOARD mainboard VENDOR/MAINBOARD option CC = "CROSSCC" -option CROSS_COMPILE = "CROSS_PREFIX" -option HOSTCC = "CROSS_HOSTCC" +option CONFIG_CROSS_COMPILE = "CROSS_PREFIX" +option CONFIG_HOSTCC = "CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ -option ROM_SIZE = 512 * 1024 +option CONFIG_ROM_SIZE = 512 * 1024 romimage "image" - option USE_FALLBACK_IMAGE = 1 - option ROM_IMAGE_SIZE = 128 * 1024 + option CONFIG_USE_FALLBACK_IMAGE = 1 + option CONFIG_ROM_IMAGE_SIZE = 128 * 1024 option COREBOOT_EXTRA_VERSION = ".0Fallback" payload __PAYLOAD__ end -buildrom ./coreboot.rom ROM_SIZE "image" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "image" diff --git a/targets/via/pc2500e/Config.lb b/targets/via/pc2500e/Config.lb index 9846b4cdf1..4d8fa8ebe6 100644 --- a/targets/via/pc2500e/Config.lb +++ b/targets/via/pc2500e/Config.lb @@ -26,4 +26,4 @@ romimage "image" payload ../payload.elf end -buildrom ./coreboot.rom ROM_SIZE "image" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "image" diff --git a/targets/via/vt8454c/Config-abuild.lb b/targets/via/vt8454c/Config-abuild.lb index a6c5ef1553..eb67dfae96 100644 --- a/targets/via/vt8454c/Config-abuild.lb +++ b/targets/via/vt8454c/Config-abuild.lb @@ -25,19 +25,19 @@ target VENDOR_MAINBOARD mainboard VENDOR/MAINBOARD option CC="CROSSCC" -option CROSS_COMPILE="CROSS_PREFIX" -option HOSTCC="CROSS_HOSTCC" +option CONFIG_CROSS_COMPILE="CROSS_PREFIX" +option CONFIG_HOSTCC="CROSS_HOSTCC" -option ROM_SIZE=512*1024 +option CONFIG_ROM_SIZE=512*1024 __COMPRESSION__ __LOGLEVEL__ romimage "fallback" - option USE_FALLBACK_IMAGE=1 + option CONFIG_USE_FALLBACK_IMAGE=1 option COREBOOT_EXTRA_VERSION=".0-fallback" payload __PAYLOAD__ end -buildrom ./coreboot.rom ROM_SIZE "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "fallback" #pci_rom $(TOP)/via-cx700.rom vendor_id=0x1106 device_id=0x3157 diff --git a/targets/via/vt8454c/Config.lb b/targets/via/vt8454c/Config.lb index b98352b8d3..cb42703260 100644 --- a/targets/via/vt8454c/Config.lb +++ b/targets/via/vt8454c/Config.lb @@ -23,21 +23,21 @@ target via_vt8454c mainboard via/vt8454c -option MAXIMUM_CONSOLE_LOGLEVEL=5 -option DEFAULT_CONSOLE_LOGLEVEL=5 +option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=5 +option CONFIG_DEFAULT_CONSOLE_LOGLEVEL=5 -option ROM_SIZE=(512-64)*1024 +option CONFIG_ROM_SIZE=(512-64)*1024 romimage "normal" - option USE_FALLBACK_IMAGE=0 + option CONFIG_USE_FALLBACK_IMAGE=0 option COREBOOT_EXTRA_VERSION=".0-normal" payload $(HOME)/payload.elf end romimage "fallback" - option USE_FALLBACK_IMAGE=1 + option CONFIG_USE_FALLBACK_IMAGE=1 option COREBOOT_EXTRA_VERSION=".0-fallback" payload $(HOME)/payload.elf end -buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback" -- cgit v1.2.3